22 #ifndef AARCH64_TDEP_H 23 #define AARCH64_TDEP_H 32 #define AARCH64_DWARF_X0 0 33 #define AARCH64_DWARF_SP 31 34 #define AARCH64_DWARF_V0 64 37 #define X_REGISTER_SIZE 8 38 #define B_REGISTER_SIZE 1 39 #define H_REGISTER_SIZE 2 40 #define S_REGISTER_SIZE 4 41 #define D_REGISTER_SIZE 8 42 #define V_REGISTER_SIZE 16 43 #define Q_REGISTER_SIZE 16 46 #define AARCH64_X_REGISTER_COUNT 32 48 #define AARCH64_D_REGISTER_COUNT 32 52 #define DISPLACED_MODIFIED_INSNS 1
regcache(gdbarch *gdbarch)
int(* aarch64_syscall_record)(struct regcache *regcache, unsigned long svc_number)
const target_desc * aarch64_read_description()
int aarch64_process_record(struct gdbarch *gdbarch, struct regcache *regcache, CORE_ADDR addr)
int aarch64_displaced_step_hw_singlestep(struct gdbarch *gdbarch, struct displaced_step_closure *closure)
void aarch64_displaced_step_fixup(struct gdbarch *gdbarch, struct displaced_step_closure *dsc, CORE_ADDR from, CORE_ADDR to, struct regcache *regs)
struct displaced_step_closure * aarch64_displaced_step_copy_insn(struct gdbarch *gdbarch, CORE_ADDR from, CORE_ADDR to, struct regcache *regs)