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/tmp/gdb-8.1/gdb/sh-tdep.c
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1 /* Target-dependent code for Renesas Super-H, for GDB.
2 
3  Copyright (C) 1993-2018 Free Software Foundation, Inc.
4 
5  This file is part of GDB.
6 
7  This program is free software; you can redistribute it and/or modify
8  it under the terms of the GNU General Public License as published by
9  the Free Software Foundation; either version 3 of the License, or
10  (at your option) any later version.
11 
12  This program is distributed in the hope that it will be useful,
13  but WITHOUT ANY WARRANTY; without even the implied warranty of
14  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15  GNU General Public License for more details.
16 
17  You should have received a copy of the GNU General Public License
18  along with this program. If not, see <http://www.gnu.org/licenses/>. */
19 
20 /* Contributed by Steve Chamberlain
21  sac@cygnus.com. */
22 
23 #include "defs.h"
24 #include "frame.h"
25 #include "frame-base.h"
26 #include "frame-unwind.h"
27 #include "dwarf2-frame.h"
28 #include "symtab.h"
29 #include "gdbtypes.h"
30 #include "gdbcmd.h"
31 #include "gdbcore.h"
32 #include "value.h"
33 #include "dis-asm.h"
34 #include "inferior.h"
35 #include "arch-utils.h"
36 #include "regcache.h"
37 #include "target-float.h"
38 #include "osabi.h"
39 #include "reggroups.h"
40 #include "regset.h"
41 #include "objfiles.h"
42 
43 #include "sh-tdep.h"
44 #include "sh64-tdep.h"
45 
46 #include "elf-bfd.h"
47 #include "solib-svr4.h"
48 
49 /* sh flags */
50 #include "elf/sh.h"
51 #include "dwarf2.h"
52 /* registers numbers shared with the simulator. */
53 #include "gdb/sim-sh.h"
54 #include <algorithm>
55 
56 /* List of "set sh ..." and "show sh ..." commands. */
57 static struct cmd_list_element *setshcmdlist = NULL;
58 static struct cmd_list_element *showshcmdlist = NULL;
59 
60 static const char sh_cc_gcc[] = "gcc";
61 static const char sh_cc_renesas[] = "renesas";
62 static const char *const sh_cc_enum[] = {
63  sh_cc_gcc,
65  NULL
66 };
67 
69 
70 #define SH_NUM_REGS 67
71 
73 {
74  /* Base address. */
78 
79  /* Flag showing that a frame has been created in the prologue code. */
80  int uses_fp;
81 
82  /* Saved registers. */
85 };
86 
87 static int
89 {
90  int val = 0;
91 
92  if (func_type)
93  {
95 
98 
100  && TYPE_CALLING_CONVENTION (func_type) == DW_CC_GNU_renesas_sh)
101  val = 1;
102  }
103 
105  val = 1;
106 
107  return val;
108 }
109 
110 static const char *
111 sh_sh_register_name (struct gdbarch *gdbarch, int reg_nr)
112 {
113  static const char *register_names[] = {
114  "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
115  "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
116  "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
117  "", "",
118  "", "", "", "", "", "", "", "",
119  "", "", "", "", "", "", "", "",
120  "", "",
121  "", "", "", "", "", "", "", "",
122  "", "", "", "", "", "", "", "",
123  "", "", "", "", "", "", "", "",
124  };
125  if (reg_nr < 0)
126  return NULL;
127  if (reg_nr >= (sizeof (register_names) / sizeof (*register_names)))
128  return NULL;
129  return register_names[reg_nr];
130 }
131 
132 static const char *
133 sh_sh3_register_name (struct gdbarch *gdbarch, int reg_nr)
134 {
135  static const char *register_names[] = {
136  "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
137  "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
138  "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
139  "", "",
140  "", "", "", "", "", "", "", "",
141  "", "", "", "", "", "", "", "",
142  "ssr", "spc",
143  "r0b0", "r1b0", "r2b0", "r3b0", "r4b0", "r5b0", "r6b0", "r7b0",
144  "r0b1", "r1b1", "r2b1", "r3b1", "r4b1", "r5b1", "r6b1", "r7b1"
145  "", "", "", "", "", "", "", "",
146  };
147  if (reg_nr < 0)
148  return NULL;
149  if (reg_nr >= (sizeof (register_names) / sizeof (*register_names)))
150  return NULL;
151  return register_names[reg_nr];
152 }
153 
154 static const char *
155 sh_sh3e_register_name (struct gdbarch *gdbarch, int reg_nr)
156 {
157  static const char *register_names[] = {
158  "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
159  "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
160  "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
161  "fpul", "fpscr",
162  "fr0", "fr1", "fr2", "fr3", "fr4", "fr5", "fr6", "fr7",
163  "fr8", "fr9", "fr10", "fr11", "fr12", "fr13", "fr14", "fr15",
164  "ssr", "spc",
165  "r0b0", "r1b0", "r2b0", "r3b0", "r4b0", "r5b0", "r6b0", "r7b0",
166  "r0b1", "r1b1", "r2b1", "r3b1", "r4b1", "r5b1", "r6b1", "r7b1",
167  "", "", "", "", "", "", "", "",
168  };
169  if (reg_nr < 0)
170  return NULL;
171  if (reg_nr >= (sizeof (register_names) / sizeof (*register_names)))
172  return NULL;
173  return register_names[reg_nr];
174 }
175 
176 static const char *
177 sh_sh2e_register_name (struct gdbarch *gdbarch, int reg_nr)
178 {
179  static const char *register_names[] = {
180  "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
181  "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
182  "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
183  "fpul", "fpscr",
184  "fr0", "fr1", "fr2", "fr3", "fr4", "fr5", "fr6", "fr7",
185  "fr8", "fr9", "fr10", "fr11", "fr12", "fr13", "fr14", "fr15",
186  "", "",
187  "", "", "", "", "", "", "", "",
188  "", "", "", "", "", "", "", "",
189  "", "", "", "", "", "", "", "",
190  };
191  if (reg_nr < 0)
192  return NULL;
193  if (reg_nr >= (sizeof (register_names) / sizeof (*register_names)))
194  return NULL;
195  return register_names[reg_nr];
196 }
197 
198 static const char *
199 sh_sh2a_register_name (struct gdbarch *gdbarch, int reg_nr)
200 {
201  static const char *register_names[] = {
202  /* general registers 0-15 */
203  "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
204  "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
205  /* 16 - 22 */
206  "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
207  /* 23, 24 */
208  "fpul", "fpscr",
209  /* floating point registers 25 - 40 */
210  "fr0", "fr1", "fr2", "fr3", "fr4", "fr5", "fr6", "fr7",
211  "fr8", "fr9", "fr10", "fr11", "fr12", "fr13", "fr14", "fr15",
212  /* 41, 42 */
213  "", "",
214  /* 43 - 62. Banked registers. The bank number used is determined by
215  the bank register (63). */
216  "r0b", "r1b", "r2b", "r3b", "r4b", "r5b", "r6b", "r7b",
217  "r8b", "r9b", "r10b", "r11b", "r12b", "r13b", "r14b",
218  "machb", "ivnb", "prb", "gbrb", "maclb",
219  /* 63: register bank number, not a real register but used to
220  communicate the register bank currently get/set. This register
221  is hidden to the user, who manipulates it using the pseudo
222  register called "bank" (67). See below. */
223  "",
224  /* 64 - 66 */
225  "ibcr", "ibnr", "tbr",
226  /* 67: register bank number, the user visible pseudo register. */
227  "bank",
228  /* double precision (pseudo) 68 - 75 */
229  "dr0", "dr2", "dr4", "dr6", "dr8", "dr10", "dr12", "dr14",
230  };
231  if (reg_nr < 0)
232  return NULL;
233  if (reg_nr >= (sizeof (register_names) / sizeof (*register_names)))
234  return NULL;
235  return register_names[reg_nr];
236 }
237 
238 static const char *
240 {
241  static const char *register_names[] = {
242  /* general registers 0-15 */
243  "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
244  "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
245  /* 16 - 22 */
246  "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
247  /* 23, 24 */
248  "", "",
249  /* floating point registers 25 - 40 */
250  "", "", "", "", "", "", "", "",
251  "", "", "", "", "", "", "", "",
252  /* 41, 42 */
253  "", "",
254  /* 43 - 62. Banked registers. The bank number used is determined by
255  the bank register (63). */
256  "r0b", "r1b", "r2b", "r3b", "r4b", "r5b", "r6b", "r7b",
257  "r8b", "r9b", "r10b", "r11b", "r12b", "r13b", "r14b",
258  "machb", "ivnb", "prb", "gbrb", "maclb",
259  /* 63: register bank number, not a real register but used to
260  communicate the register bank currently get/set. This register
261  is hidden to the user, who manipulates it using the pseudo
262  register called "bank" (67). See below. */
263  "",
264  /* 64 - 66 */
265  "ibcr", "ibnr", "tbr",
266  /* 67: register bank number, the user visible pseudo register. */
267  "bank",
268  /* double precision (pseudo) 68 - 75 */
269  "", "", "", "", "", "", "", "",
270  };
271  if (reg_nr < 0)
272  return NULL;
273  if (reg_nr >= (sizeof (register_names) / sizeof (*register_names)))
274  return NULL;
275  return register_names[reg_nr];
276 }
277 
278 static const char *
280 {
281  static const char *register_names[] = {
282  "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
283  "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
284  "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
285  "", "dsr",
286  "a0g", "a0", "a1g", "a1", "m0", "m1", "x0", "x1",
287  "y0", "y1", "", "", "", "", "", "mod",
288  "", "",
289  "rs", "re", "", "", "", "", "", "",
290  "", "", "", "", "", "", "", "",
291  "", "", "", "", "", "", "", "",
292  };
293  if (reg_nr < 0)
294  return NULL;
295  if (reg_nr >= (sizeof (register_names) / sizeof (*register_names)))
296  return NULL;
297  return register_names[reg_nr];
298 }
299 
300 static const char *
302 {
303  static const char *register_names[] = {
304  "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
305  "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
306  "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
307  "", "dsr",
308  "a0g", "a0", "a1g", "a1", "m0", "m1", "x0", "x1",
309  "y0", "y1", "", "", "", "", "", "mod",
310  "ssr", "spc",
311  "rs", "re", "", "", "", "", "", "",
312  "r0b", "r1b", "r2b", "r3b", "r4b", "r5b", "r6b", "r7b",
313  "", "", "", "", "", "", "", "",
314  "", "", "", "", "", "", "", "",
315  };
316  if (reg_nr < 0)
317  return NULL;
318  if (reg_nr >= (sizeof (register_names) / sizeof (*register_names)))
319  return NULL;
320  return register_names[reg_nr];
321 }
322 
323 static const char *
324 sh_sh4_register_name (struct gdbarch *gdbarch, int reg_nr)
325 {
326  static const char *register_names[] = {
327  /* general registers 0-15 */
328  "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
329  "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
330  /* 16 - 22 */
331  "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
332  /* 23, 24 */
333  "fpul", "fpscr",
334  /* floating point registers 25 - 40 */
335  "fr0", "fr1", "fr2", "fr3", "fr4", "fr5", "fr6", "fr7",
336  "fr8", "fr9", "fr10", "fr11", "fr12", "fr13", "fr14", "fr15",
337  /* 41, 42 */
338  "ssr", "spc",
339  /* bank 0 43 - 50 */
340  "r0b0", "r1b0", "r2b0", "r3b0", "r4b0", "r5b0", "r6b0", "r7b0",
341  /* bank 1 51 - 58 */
342  "r0b1", "r1b1", "r2b1", "r3b1", "r4b1", "r5b1", "r6b1", "r7b1",
343  /* 59 - 66 */
344  "", "", "", "", "", "", "", "",
345  /* pseudo bank register. */
346  "",
347  /* double precision (pseudo) 68 - 75 */
348  "dr0", "dr2", "dr4", "dr6", "dr8", "dr10", "dr12", "dr14",
349  /* vectors (pseudo) 76 - 79 */
350  "fv0", "fv4", "fv8", "fv12",
351  /* FIXME: missing XF */
352  /* FIXME: missing XD */
353  };
354  if (reg_nr < 0)
355  return NULL;
356  if (reg_nr >= (sizeof (register_names) / sizeof (*register_names)))
357  return NULL;
358  return register_names[reg_nr];
359 }
360 
361 static const char *
363 {
364  static const char *register_names[] = {
365  /* general registers 0-15 */
366  "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
367  "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
368  /* 16 - 22 */
369  "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
370  /* 23, 24 */
371  "", "",
372  /* floating point registers 25 - 40 -- not for nofpu target */
373  "", "", "", "", "", "", "", "",
374  "", "", "", "", "", "", "", "",
375  /* 41, 42 */
376  "ssr", "spc",
377  /* bank 0 43 - 50 */
378  "r0b0", "r1b0", "r2b0", "r3b0", "r4b0", "r5b0", "r6b0", "r7b0",
379  /* bank 1 51 - 58 */
380  "r0b1", "r1b1", "r2b1", "r3b1", "r4b1", "r5b1", "r6b1", "r7b1",
381  /* 59 - 66 */
382  "", "", "", "", "", "", "", "",
383  /* pseudo bank register. */
384  "",
385  /* double precision (pseudo) 68 - 75 -- not for nofpu target */
386  "", "", "", "", "", "", "", "",
387  /* vectors (pseudo) 76 - 79 -- not for nofpu target */
388  "", "", "", "",
389  };
390  if (reg_nr < 0)
391  return NULL;
392  if (reg_nr >= (sizeof (register_names) / sizeof (*register_names)))
393  return NULL;
394  return register_names[reg_nr];
395 }
396 
397 static const char *
399 {
400  static const char *register_names[] = {
401  "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
402  "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
403  "pc", "pr", "gbr", "vbr", "mach", "macl", "sr",
404  "", "dsr",
405  "a0g", "a0", "a1g", "a1", "m0", "m1", "x0", "x1",
406  "y0", "y1", "", "", "", "", "", "mod",
407  "ssr", "spc",
408  "rs", "re", "", "", "", "", "", "",
409  "r0b", "r1b", "r2b", "r3b", "r4b", "r5b", "r6b", "r7b",
410  "", "", "", "", "", "", "", "",
411  "", "", "", "", "", "", "", "",
412  };
413  if (reg_nr < 0)
414  return NULL;
415  if (reg_nr >= (sizeof (register_names) / sizeof (*register_names)))
416  return NULL;
417  return register_names[reg_nr];
418 }
419 
420 /* Implement the breakpoint_kind_from_pc gdbarch method. */
421 
422 static int
424 {
425  return 2;
426 }
427 
428 /* Implement the sw_breakpoint_from_kind gdbarch method. */
429 
430 static const gdb_byte *
432 {
433  *size = kind;
434 
435  /* For remote stub targets, trapa #20 is used. */
436  if (strcmp (target_shortname, "remote") == 0)
437  {
438  static unsigned char big_remote_breakpoint[] = { 0xc3, 0x20 };
439  static unsigned char little_remote_breakpoint[] = { 0x20, 0xc3 };
440 
441  if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG)
442  return big_remote_breakpoint;
443  else
444  return little_remote_breakpoint;
445  }
446  else
447  {
448  /* 0xc3c3 is trapa #c3, and it works in big and little endian
449  modes. */
450  static unsigned char breakpoint[] = { 0xc3, 0xc3 };
451 
452  return breakpoint;
453  }
454 }
455 
456 /* Prologue looks like
457  mov.l r14,@-r15
458  sts.l pr,@-r15
459  mov.l <regs>,@-r15
460  sub <room_for_loca_vars>,r15
461  mov r15,r14
462 
463  Actually it can be more complicated than this but that's it, basically. */
464 
465 #define GET_SOURCE_REG(x) (((x) >> 4) & 0xf)
466 #define GET_TARGET_REG(x) (((x) >> 8) & 0xf)
467 
468 /* JSR @Rm 0100mmmm00001011 */
469 #define IS_JSR(x) (((x) & 0xf0ff) == 0x400b)
470 
471 /* STS.L PR,@-r15 0100111100100010
472  r15-4-->r15, PR-->(r15) */
473 #define IS_STS(x) ((x) == 0x4f22)
474 
475 /* STS.L MACL,@-r15 0100111100010010
476  r15-4-->r15, MACL-->(r15) */
477 #define IS_MACL_STS(x) ((x) == 0x4f12)
478 
479 /* MOV.L Rm,@-r15 00101111mmmm0110
480  r15-4-->r15, Rm-->(R15) */
481 #define IS_PUSH(x) (((x) & 0xff0f) == 0x2f06)
482 
483 /* MOV r15,r14 0110111011110011
484  r15-->r14 */
485 #define IS_MOV_SP_FP(x) ((x) == 0x6ef3)
486 
487 /* ADD #imm,r15 01111111iiiiiiii
488  r15+imm-->r15 */
489 #define IS_ADD_IMM_SP(x) (((x) & 0xff00) == 0x7f00)
490 
491 #define IS_MOV_R3(x) (((x) & 0xff00) == 0x1a00)
492 #define IS_SHLL_R3(x) ((x) == 0x4300)
493 
494 /* ADD r3,r15 0011111100111100
495  r15+r3-->r15 */
496 #define IS_ADD_R3SP(x) ((x) == 0x3f3c)
497 
498 /* FMOV.S FRm,@-Rn Rn-4-->Rn, FRm-->(Rn) 1111nnnnmmmm1011
499  FMOV DRm,@-Rn Rn-8-->Rn, DRm-->(Rn) 1111nnnnmmm01011
500  FMOV XDm,@-Rn Rn-8-->Rn, XDm-->(Rn) 1111nnnnmmm11011 */
501 /* CV, 2003-08-28: Only suitable with Rn == SP, therefore name changed to
502  make this entirely clear. */
503 /* #define IS_FMOV(x) (((x) & 0xf00f) == 0xf00b) */
504 #define IS_FPUSH(x) (((x) & 0xff0f) == 0xff0b)
505 
506 /* MOV Rm,Rn Rm-->Rn 0110nnnnmmmm0011 4 <= m <= 7 */
507 #define IS_MOV_ARG_TO_REG(x) \
508  (((x) & 0xf00f) == 0x6003 && \
509  ((x) & 0x00f0) >= 0x0040 && \
510  ((x) & 0x00f0) <= 0x0070)
511 /* MOV.L Rm,@Rn 0010nnnnmmmm0010 n = 14, 4 <= m <= 7 */
512 #define IS_MOV_ARG_TO_IND_R14(x) \
513  (((x) & 0xff0f) == 0x2e02 && \
514  ((x) & 0x00f0) >= 0x0040 && \
515  ((x) & 0x00f0) <= 0x0070)
516 /* MOV.L Rm,@(disp*4,Rn) 00011110mmmmdddd n = 14, 4 <= m <= 7 */
517 #define IS_MOV_ARG_TO_IND_R14_WITH_DISP(x) \
518  (((x) & 0xff00) == 0x1e00 && \
519  ((x) & 0x00f0) >= 0x0040 && \
520  ((x) & 0x00f0) <= 0x0070)
521 
522 /* MOV.W @(disp*2,PC),Rn 1001nnnndddddddd */
523 #define IS_MOVW_PCREL_TO_REG(x) (((x) & 0xf000) == 0x9000)
524 /* MOV.L @(disp*4,PC),Rn 1101nnnndddddddd */
525 #define IS_MOVL_PCREL_TO_REG(x) (((x) & 0xf000) == 0xd000)
526 /* MOVI20 #imm20,Rn 0000nnnniiii0000 */
527 #define IS_MOVI20(x) (((x) & 0xf00f) == 0x0000)
528 /* SUB Rn,R15 00111111nnnn1000 */
529 #define IS_SUB_REG_FROM_SP(x) (((x) & 0xff0f) == 0x3f08)
530 
531 #define FPSCR_SZ (1 << 20)
532 
533 /* The following instructions are used for epilogue testing. */
534 #define IS_RESTORE_FP(x) ((x) == 0x6ef6)
535 #define IS_RTS(x) ((x) == 0x000b)
536 #define IS_LDS(x) ((x) == 0x4f26)
537 #define IS_MACL_LDS(x) ((x) == 0x4f16)
538 #define IS_MOV_FP_SP(x) ((x) == 0x6fe3)
539 #define IS_ADD_REG_TO_FP(x) (((x) & 0xff0f) == 0x3e0c)
540 #define IS_ADD_IMM_FP(x) (((x) & 0xff00) == 0x7e00)
541 
542 static CORE_ADDR
544  CORE_ADDR pc, CORE_ADDR limit_pc,
545  struct sh_frame_cache *cache, ULONGEST fpscr)
546 {
547  enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
548  ULONGEST inst;
549  int offset;
550  int sav_offset = 0;
551  int r3_val = 0;
552  int reg, sav_reg = -1;
553 
554  cache->uses_fp = 0;
555  for (; pc < limit_pc; pc += 2)
556  {
557  inst = read_memory_unsigned_integer (pc, 2, byte_order);
558  /* See where the registers will be saved to. */
559  if (IS_PUSH (inst))
560  {
561  cache->saved_regs[GET_SOURCE_REG (inst)] = cache->sp_offset;
562  cache->sp_offset += 4;
563  }
564  else if (IS_STS (inst))
565  {
566  cache->saved_regs[PR_REGNUM] = cache->sp_offset;
567  cache->sp_offset += 4;
568  }
569  else if (IS_MACL_STS (inst))
570  {
571  cache->saved_regs[MACL_REGNUM] = cache->sp_offset;
572  cache->sp_offset += 4;
573  }
574  else if (IS_MOV_R3 (inst))
575  {
576  r3_val = ((inst & 0xff) ^ 0x80) - 0x80;
577  }
578  else if (IS_SHLL_R3 (inst))
579  {
580  r3_val <<= 1;
581  }
582  else if (IS_ADD_R3SP (inst))
583  {
584  cache->sp_offset += -r3_val;
585  }
586  else if (IS_ADD_IMM_SP (inst))
587  {
588  offset = ((inst & 0xff) ^ 0x80) - 0x80;
589  cache->sp_offset -= offset;
590  }
591  else if (IS_MOVW_PCREL_TO_REG (inst))
592  {
593  if (sav_reg < 0)
594  {
595  reg = GET_TARGET_REG (inst);
596  if (reg < 14)
597  {
598  sav_reg = reg;
599  offset = (inst & 0xff) << 1;
600  sav_offset =
601  read_memory_integer ((pc + 4) + offset, 2, byte_order);
602  }
603  }
604  }
605  else if (IS_MOVL_PCREL_TO_REG (inst))
606  {
607  if (sav_reg < 0)
608  {
609  reg = GET_TARGET_REG (inst);
610  if (reg < 14)
611  {
612  sav_reg = reg;
613  offset = (inst & 0xff) << 2;
614  sav_offset =
615  read_memory_integer (((pc & 0xfffffffc) + 4) + offset,
616  4, byte_order);
617  }
618  }
619  }
620  else if (IS_MOVI20 (inst)
621  && (pc + 2 < limit_pc))
622  {
623  if (sav_reg < 0)
624  {
625  reg = GET_TARGET_REG (inst);
626  if (reg < 14)
627  {
628  sav_reg = reg;
629  sav_offset = GET_SOURCE_REG (inst) << 16;
630  /* MOVI20 is a 32 bit instruction! */
631  pc += 2;
632  sav_offset
633  |= read_memory_unsigned_integer (pc, 2, byte_order);
634  /* Now sav_offset contains an unsigned 20 bit value.
635  It must still get sign extended. */
636  if (sav_offset & 0x00080000)
637  sav_offset |= 0xfff00000;
638  }
639  }
640  }
641  else if (IS_SUB_REG_FROM_SP (inst))
642  {
643  reg = GET_SOURCE_REG (inst);
644  if (sav_reg > 0 && reg == sav_reg)
645  {
646  sav_reg = -1;
647  }
648  cache->sp_offset += sav_offset;
649  }
650  else if (IS_FPUSH (inst))
651  {
652  if (fpscr & FPSCR_SZ)
653  {
654  cache->sp_offset += 8;
655  }
656  else
657  {
658  cache->sp_offset += 4;
659  }
660  }
661  else if (IS_MOV_SP_FP (inst))
662  {
663  pc += 2;
664  /* Don't go any further than six more instructions. */
665  limit_pc = std::min (limit_pc, pc + (2 * 6));
666 
667  cache->uses_fp = 1;
668  /* At this point, only allow argument register moves to other
669  registers or argument register moves to @(X,fp) which are
670  moving the register arguments onto the stack area allocated
671  by a former add somenumber to SP call. Don't allow moving
672  to an fp indirect address above fp + cache->sp_offset. */
673  for (; pc < limit_pc; pc += 2)
674  {
675  inst = read_memory_integer (pc, 2, byte_order);
676  if (IS_MOV_ARG_TO_IND_R14 (inst))
677  {
678  reg = GET_SOURCE_REG (inst);
679  if (cache->sp_offset > 0)
680  cache->saved_regs[reg] = cache->sp_offset;
681  }
682  else if (IS_MOV_ARG_TO_IND_R14_WITH_DISP (inst))
683  {
684  reg = GET_SOURCE_REG (inst);
685  offset = (inst & 0xf) * 4;
686  if (cache->sp_offset > offset)
687  cache->saved_regs[reg] = cache->sp_offset - offset;
688  }
689  else if (IS_MOV_ARG_TO_REG (inst))
690  continue;
691  else
692  break;
693  }
694  break;
695  }
696  else if (IS_JSR (inst))
697  {
698  /* We have found a jsr that has been scheduled into the prologue.
699  If we continue the scan and return a pc someplace after this,
700  then setting a breakpoint on this function will cause it to
701  appear to be called after the function it is calling via the
702  jsr, which will be very confusing. Most likely the next
703  instruction is going to be IS_MOV_SP_FP in the delay slot. If
704  so, note that before returning the current pc. */
705  if (pc + 2 < limit_pc)
706  {
707  inst = read_memory_integer (pc + 2, 2, byte_order);
708  if (IS_MOV_SP_FP (inst))
709  cache->uses_fp = 1;
710  }
711  break;
712  }
713 #if 0 /* This used to just stop when it found an instruction
714  that was not considered part of the prologue. Now,
715  we just keep going looking for likely
716  instructions. */
717  else
718  break;
719 #endif
720  }
721 
722  return pc;
723 }
724 
725 /* Skip any prologue before the guts of a function. */
726 static CORE_ADDR
728 {
729  CORE_ADDR post_prologue_pc, func_addr, func_end_addr, limit_pc;
730  struct sh_frame_cache cache;
731 
732  /* See if we can determine the end of the prologue via the symbol table.
733  If so, then return either PC, or the PC after the prologue, whichever
734  is greater. */
735  if (find_pc_partial_function (pc, NULL, &func_addr, &func_end_addr))
736  {
737  post_prologue_pc = skip_prologue_using_sal (gdbarch, func_addr);
738  if (post_prologue_pc != 0)
739  return std::max (pc, post_prologue_pc);
740  }
741 
742  /* Can't determine prologue from the symbol table, need to examine
743  instructions. */
744 
745  /* Find an upper limit on the function prologue using the debug
746  information. If the debug information could not be used to provide
747  that bound, then use an arbitrary large number as the upper bound. */
748  limit_pc = skip_prologue_using_sal (gdbarch, pc);
749  if (limit_pc == 0)
750  /* Don't go any further than 28 instructions. */
751  limit_pc = pc + (2 * 28);
752 
753  /* Do not allow limit_pc to be past the function end, if we know
754  where that end is... */
755  if (func_end_addr != 0)
756  limit_pc = std::min (limit_pc, func_end_addr);
757 
758  cache.sp_offset = -4;
759  post_prologue_pc = sh_analyze_prologue (gdbarch, pc, limit_pc, &cache, 0);
760  if (cache.uses_fp)
761  pc = post_prologue_pc;
762 
763  return pc;
764 }
765 
766 /* The ABI says:
767 
768  Aggregate types not bigger than 8 bytes that have the same size and
769  alignment as one of the integer scalar types are returned in the
770  same registers as the integer type they match.
771 
772  For example, a 2-byte aligned structure with size 2 bytes has the
773  same size and alignment as a short int, and will be returned in R0.
774  A 4-byte aligned structure with size 8 bytes has the same size and
775  alignment as a long long int, and will be returned in R0 and R1.
776 
777  When an aggregate type is returned in R0 and R1, R0 contains the
778  first four bytes of the aggregate, and R1 contains the
779  remainder. If the size of the aggregate type is not a multiple of 4
780  bytes, the aggregate is tail-padded up to a multiple of 4
781  bytes. The value of the padding is undefined. For little-endian
782  targets the padding will appear at the most significant end of the
783  last element, for big-endian targets the padding appears at the
784  least significant end of the last element.
785 
786  All other aggregate types are returned by address. The caller
787  function passes the address of an area large enough to hold the
788  aggregate value in R2. The called function stores the result in
789  this location.
790 
791  To reiterate, structs smaller than 8 bytes could also be returned
792  in memory, if they don't pass the "same size and alignment as an
793  integer type" rule.
794 
795  For example, in
796 
797  struct s { char c[3]; } wibble;
798  struct s foo(void) { return wibble; }
799 
800  the return value from foo() will be in memory, not
801  in R0, because there is no 3-byte integer type.
802 
803  Similarly, in
804 
805  struct s { char c[2]; } wibble;
806  struct s foo(void) { return wibble; }
807 
808  because a struct containing two chars has alignment 1, that matches
809  type char, but size 2, that matches type short. There's no integer
810  type that has alignment 1 and size 2, so the struct is returned in
811  memory. */
812 
813 static int
814 sh_use_struct_convention (int renesas_abi, struct type *type)
815 {
816  int len = TYPE_LENGTH (type);
817  int nelem = TYPE_NFIELDS (type);
818 
819  /* The Renesas ABI returns aggregate types always on stack. */
820  if (renesas_abi && (TYPE_CODE (type) == TYPE_CODE_STRUCT
821  || TYPE_CODE (type) == TYPE_CODE_UNION))
822  return 1;
823 
824  /* Non-power of 2 length types and types bigger than 8 bytes (which don't
825  fit in two registers anyway) use struct convention. */
826  if (len != 1 && len != 2 && len != 4 && len != 8)
827  return 1;
828 
829  /* Scalar types and aggregate types with exactly one field are aligned
830  by definition. They are returned in registers. */
831  if (nelem <= 1)
832  return 0;
833 
834  /* If the first field in the aggregate has the same length as the entire
835  aggregate type, the type is returned in registers. */
836  if (TYPE_LENGTH (TYPE_FIELD_TYPE (type, 0)) == len)
837  return 0;
838 
839  /* If the size of the aggregate is 8 bytes and the first field is
840  of size 4 bytes its alignment is equal to long long's alignment,
841  so it's returned in registers. */
842  if (len == 8 && TYPE_LENGTH (TYPE_FIELD_TYPE (type, 0)) == 4)
843  return 0;
844 
845  /* Otherwise use struct convention. */
846  return 1;
847 }
848 
849 static int
850 sh_use_struct_convention_nofpu (int renesas_abi, struct type *type)
851 {
852  /* The Renesas ABI returns long longs/doubles etc. always on stack. */
853  if (renesas_abi && TYPE_NFIELDS (type) == 0 && TYPE_LENGTH (type) >= 8)
854  return 1;
855  return sh_use_struct_convention (renesas_abi, type);
856 }
857 
858 static CORE_ADDR
860 {
861  return sp & ~3;
862 }
863 
864 /* Function: push_dummy_call (formerly push_arguments)
865  Setup the function arguments for calling a function in the inferior.
866 
867  On the Renesas SH architecture, there are four registers (R4 to R7)
868  which are dedicated for passing function arguments. Up to the first
869  four arguments (depending on size) may go into these registers.
870  The rest go on the stack.
871 
872  MVS: Except on SH variants that have floating point registers.
873  In that case, float and double arguments are passed in the same
874  manner, but using FP registers instead of GP registers.
875 
876  Arguments that are smaller than 4 bytes will still take up a whole
877  register or a whole 32-bit word on the stack, and will be
878  right-justified in the register or the stack word. This includes
879  chars, shorts, and small aggregate types.
880 
881  Arguments that are larger than 4 bytes may be split between two or
882  more registers. If there are not enough registers free, an argument
883  may be passed partly in a register (or registers), and partly on the
884  stack. This includes doubles, long longs, and larger aggregates.
885  As far as I know, there is no upper limit to the size of aggregates
886  that will be passed in this way; in other words, the convention of
887  passing a pointer to a large aggregate instead of a copy is not used.
888 
889  MVS: The above appears to be true for the SH variants that do not
890  have an FPU, however those that have an FPU appear to copy the
891  aggregate argument onto the stack (and not place it in registers)
892  if it is larger than 16 bytes (four GP registers).
893 
894  An exceptional case exists for struct arguments (and possibly other
895  aggregates such as arrays) if the size is larger than 4 bytes but
896  not a multiple of 4 bytes. In this case the argument is never split
897  between the registers and the stack, but instead is copied in its
898  entirety onto the stack, AND also copied into as many registers as
899  there is room for. In other words, space in registers permitting,
900  two copies of the same argument are passed in. As far as I can tell,
901  only the one on the stack is used, although that may be a function
902  of the level of compiler optimization. I suspect this is a compiler
903  bug. Arguments of these odd sizes are left-justified within the
904  word (as opposed to arguments smaller than 4 bytes, which are
905  right-justified).
906 
907  If the function is to return an aggregate type such as a struct, it
908  is either returned in the normal return value register R0 (if its
909  size is no greater than one byte), or else the caller must allocate
910  space into which the callee will copy the return value (if the size
911  is greater than one byte). In this case, a pointer to the return
912  value location is passed into the callee in register R2, which does
913  not displace any of the other arguments passed in via registers R4
914  to R7. */
915 
916 /* Helper function to justify value in register according to endianess. */
917 static const gdb_byte *
918 sh_justify_value_in_reg (struct gdbarch *gdbarch, struct value *val, int len)
919 {
920  static gdb_byte valbuf[4];
921 
922  memset (valbuf, 0, sizeof (valbuf));
923  if (len < 4)
924  {
925  /* value gets right-justified in the register or stack word. */
926  if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG)
927  memcpy (valbuf + (4 - len), value_contents (val), len);
928  else
929  memcpy (valbuf, value_contents (val), len);
930  return valbuf;
931  }
932  return value_contents (val);
933 }
934 
935 /* Helper function to eval number of bytes to allocate on stack. */
936 static CORE_ADDR
937 sh_stack_allocsize (int nargs, struct value **args)
938 {
939  int stack_alloc = 0;
940  while (nargs-- > 0)
941  stack_alloc += ((TYPE_LENGTH (value_type (args[nargs])) + 3) & ~3);
942  return stack_alloc;
943 }
944 
945 /* Helper functions for getting the float arguments right. Registers usage
946  depends on the ABI and the endianess. The comments should enlighten how
947  it's intended to work. */
948 
949 /* This array stores which of the float arg registers are already in use. */
951 
952 /* This function just resets the above array to "no reg used so far". */
953 static void
955 {
957 }
958 
959 /* This function returns the next register to use for float arg passing.
960  It returns either a valid value between FLOAT_ARG0_REGNUM and
961  FLOAT_ARGLAST_REGNUM if a register is available, otherwise it returns
962  FLOAT_ARGLAST_REGNUM + 1 to indicate that no register is available.
963 
964  Note that register number 0 in flt_argreg_array corresponds with the
965  real float register fr4. In contrast to FLOAT_ARG0_REGNUM (value is
966  29) the parity of the register number is preserved, which is important
967  for the double register passing test (see the "argreg & 1" test below). */
968 static int
969 sh_next_flt_argreg (struct gdbarch *gdbarch, int len, struct type *func_type)
970 {
971  int argreg;
972 
973  /* First search for the next free register. */
974  for (argreg = 0; argreg <= FLOAT_ARGLAST_REGNUM - FLOAT_ARG0_REGNUM;
975  ++argreg)
976  if (!flt_argreg_array[argreg])
977  break;
978 
979  /* No register left? */
981  return FLOAT_ARGLAST_REGNUM + 1;
982 
983  if (len == 8)
984  {
985  /* Doubles are always starting in a even register number. */
986  if (argreg & 1)
987  {
988  /* In gcc ABI, the skipped register is lost for further argument
989  passing now. Not so in Renesas ABI. */
991  flt_argreg_array[argreg] = 1;
992 
993  ++argreg;
994 
995  /* No register left? */
997  return FLOAT_ARGLAST_REGNUM + 1;
998  }
999  /* Also mark the next register as used. */
1000  flt_argreg_array[argreg + 1] = 1;
1001  }
1002  else if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_LITTLE
1004  {
1005  /* In little endian, gcc passes floats like this: f5, f4, f7, f6, ... */
1006  if (!flt_argreg_array[argreg + 1])
1007  ++argreg;
1008  }
1009  flt_argreg_array[argreg] = 1;
1010  return FLOAT_ARG0_REGNUM + argreg;
1011 }
1012 
1013 /* Helper function which figures out, if a type is treated like a float type.
1014 
1015  The FPU ABIs have a special way how to treat types as float types.
1016  Structures with exactly one member, which is of type float or double, are
1017  treated exactly as the base types float or double:
1018 
1019  struct sf {
1020  float f;
1021  };
1022 
1023  struct sd {
1024  double d;
1025  };
1026 
1027  are handled the same way as just
1028 
1029  float f;
1030 
1031  double d;
1032 
1033  As a result, arguments of these struct types are pushed into floating point
1034  registers exactly as floats or doubles, using the same decision algorithm.
1035 
1036  The same is valid if these types are used as function return types. The
1037  above structs are returned in fr0 resp. fr0,fr1 instead of in r0, r0,r1
1038  or even using struct convention as it is for other structs. */
1039 
1040 static int
1042 {
1043  /* Ordinary float types are obviously treated as float. */
1044  if (TYPE_CODE (type) == TYPE_CODE_FLT)
1045  return 1;
1046  /* Otherwise non-struct types are not treated as float. */
1047  if (TYPE_CODE (type) != TYPE_CODE_STRUCT)
1048  return 0;
1049  /* Otherwise structs with more than one memeber are not treated as float. */
1050  if (TYPE_NFIELDS (type) != 1)
1051  return 0;
1052  /* Otherwise if the type of that member is float, the whole type is
1053  treated as float. */
1055  return 1;
1056  /* Otherwise it's not treated as float. */
1057  return 0;
1058 }
1059 
1060 static CORE_ADDR
1062  struct value *function,
1063  struct regcache *regcache,
1064  CORE_ADDR bp_addr, int nargs,
1065  struct value **args,
1066  CORE_ADDR sp, int struct_return,
1067  CORE_ADDR struct_addr)
1068 {
1069  enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1070  int stack_offset = 0;
1071  int argreg = ARG0_REGNUM;
1072  int flt_argreg = 0;
1073  int argnum;
1074  struct type *func_type = value_type (function);
1075  struct type *type;
1076  CORE_ADDR regval;
1077  const gdb_byte *val;
1078  int len, reg_size = 0;
1079  int pass_on_stack = 0;
1080  int treat_as_flt;
1081  int last_reg_arg = INT_MAX;
1082 
1083  /* The Renesas ABI expects all varargs arguments, plus the last
1084  non-vararg argument to be on the stack, no matter how many
1085  registers have been used so far. */
1087  && TYPE_VARARGS (func_type))
1088  last_reg_arg = TYPE_NFIELDS (func_type) - 2;
1089 
1090  /* First force sp to a 4-byte alignment. */
1091  sp = sh_frame_align (gdbarch, sp);
1092 
1093  /* Make room on stack for args. */
1094  sp -= sh_stack_allocsize (nargs, args);
1095 
1096  /* Initialize float argument mechanism. */
1097  sh_init_flt_argreg ();
1098 
1099  /* Now load as many as possible of the first arguments into
1100  registers, and push the rest onto the stack. There are 16 bytes
1101  in four registers available. Loop thru args from first to last. */
1102  for (argnum = 0; argnum < nargs; argnum++)
1103  {
1104  type = value_type (args[argnum]);
1105  len = TYPE_LENGTH (type);
1106  val = sh_justify_value_in_reg (gdbarch, args[argnum], len);
1107 
1108  /* Some decisions have to be made how various types are handled.
1109  This also differs in different ABIs. */
1110  pass_on_stack = 0;
1111 
1112  /* Find out the next register to use for a floating point value. */
1113  treat_as_flt = sh_treat_as_flt_p (type);
1114  if (treat_as_flt)
1115  flt_argreg = sh_next_flt_argreg (gdbarch, len, func_type);
1116  /* In Renesas ABI, long longs and aggregate types are always passed
1117  on stack. */
1119  && ((TYPE_CODE (type) == TYPE_CODE_INT && len == 8)
1121  || TYPE_CODE (type) == TYPE_CODE_UNION))
1122  pass_on_stack = 1;
1123  /* In contrast to non-FPU CPUs, arguments are never split between
1124  registers and stack. If an argument doesn't fit in the remaining
1125  registers it's always pushed entirely on the stack. */
1126  else if (len > ((ARGLAST_REGNUM - argreg + 1) * 4))
1127  pass_on_stack = 1;
1128 
1129  while (len > 0)
1130  {
1131  if ((treat_as_flt && flt_argreg > FLOAT_ARGLAST_REGNUM)
1132  || (!treat_as_flt && (argreg > ARGLAST_REGNUM
1133  || pass_on_stack))
1134  || argnum > last_reg_arg)
1135  {
1136  /* The data goes entirely on the stack, 4-byte aligned. */
1137  reg_size = (len + 3) & ~3;
1138  write_memory (sp + stack_offset, val, reg_size);
1139  stack_offset += reg_size;
1140  }
1141  else if (treat_as_flt && flt_argreg <= FLOAT_ARGLAST_REGNUM)
1142  {
1143  /* Argument goes in a float argument register. */
1144  reg_size = register_size (gdbarch, flt_argreg);
1145  regval = extract_unsigned_integer (val, reg_size, byte_order);
1146  /* In little endian mode, float types taking two registers
1147  (doubles on sh4, long doubles on sh2e, sh3e and sh4) must
1148  be stored swapped in the argument registers. The below
1149  code first writes the first 32 bits in the next but one
1150  register, increments the val and len values accordingly
1151  and then proceeds as normal by writing the second 32 bits
1152  into the next register. */
1153  if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_LITTLE
1154  && TYPE_LENGTH (type) == 2 * reg_size)
1155  {
1156  regcache_cooked_write_unsigned (regcache, flt_argreg + 1,
1157  regval);
1158  val += reg_size;
1159  len -= reg_size;
1160  regval = extract_unsigned_integer (val, reg_size,
1161  byte_order);
1162  }
1163  regcache_cooked_write_unsigned (regcache, flt_argreg++, regval);
1164  }
1165  else if (!treat_as_flt && argreg <= ARGLAST_REGNUM)
1166  {
1167  /* there's room in a register */
1168  reg_size = register_size (gdbarch, argreg);
1169  regval = extract_unsigned_integer (val, reg_size, byte_order);
1170  regcache_cooked_write_unsigned (regcache, argreg++, regval);
1171  }
1172  /* Store the value one register at a time or in one step on
1173  stack. */
1174  len -= reg_size;
1175  val += reg_size;
1176  }
1177  }
1178 
1179  if (struct_return)
1180  {
1182  /* If the function uses the Renesas ABI, subtract another 4 bytes from
1183  the stack and store the struct return address there. */
1184  write_memory_unsigned_integer (sp -= 4, 4, byte_order, struct_addr);
1185  else
1186  /* Using the gcc ABI, the "struct return pointer" pseudo-argument has
1187  its own dedicated register. */
1189  STRUCT_RETURN_REGNUM, struct_addr);
1190  }
1191 
1192  /* Store return address. */
1194 
1195  /* Update stack pointer. */
1197  gdbarch_sp_regnum (gdbarch), sp);
1198 
1199  return sp;
1200 }
1201 
1202 static CORE_ADDR
1204  struct value *function,
1205  struct regcache *regcache,
1206  CORE_ADDR bp_addr,
1207  int nargs, struct value **args,
1208  CORE_ADDR sp, int struct_return,
1209  CORE_ADDR struct_addr)
1210 {
1211  enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1212  int stack_offset = 0;
1213  int argreg = ARG0_REGNUM;
1214  int argnum;
1215  struct type *func_type = value_type (function);
1216  struct type *type;
1217  CORE_ADDR regval;
1218  const gdb_byte *val;
1219  int len, reg_size = 0;
1220  int pass_on_stack = 0;
1221  int last_reg_arg = INT_MAX;
1222 
1223  /* The Renesas ABI expects all varargs arguments, plus the last
1224  non-vararg argument to be on the stack, no matter how many
1225  registers have been used so far. */
1227  && TYPE_VARARGS (func_type))
1228  last_reg_arg = TYPE_NFIELDS (func_type) - 2;
1229 
1230  /* First force sp to a 4-byte alignment. */
1231  sp = sh_frame_align (gdbarch, sp);
1232 
1233  /* Make room on stack for args. */
1234  sp -= sh_stack_allocsize (nargs, args);
1235 
1236  /* Now load as many as possible of the first arguments into
1237  registers, and push the rest onto the stack. There are 16 bytes
1238  in four registers available. Loop thru args from first to last. */
1239  for (argnum = 0; argnum < nargs; argnum++)
1240  {
1241  type = value_type (args[argnum]);
1242  len = TYPE_LENGTH (type);
1243  val = sh_justify_value_in_reg (gdbarch, args[argnum], len);
1244 
1245  /* Some decisions have to be made how various types are handled.
1246  This also differs in different ABIs. */
1247  pass_on_stack = 0;
1248  /* Renesas ABI pushes doubles and long longs entirely on stack.
1249  Same goes for aggregate types. */
1251  && ((TYPE_CODE (type) == TYPE_CODE_INT && len >= 8)
1252  || (TYPE_CODE (type) == TYPE_CODE_FLT && len >= 8)
1254  || TYPE_CODE (type) == TYPE_CODE_UNION))
1255  pass_on_stack = 1;
1256  while (len > 0)
1257  {
1258  if (argreg > ARGLAST_REGNUM || pass_on_stack
1259  || argnum > last_reg_arg)
1260  {
1261  /* The remainder of the data goes entirely on the stack,
1262  4-byte aligned. */
1263  reg_size = (len + 3) & ~3;
1264  write_memory (sp + stack_offset, val, reg_size);
1265  stack_offset += reg_size;
1266  }
1267  else if (argreg <= ARGLAST_REGNUM)
1268  {
1269  /* There's room in a register. */
1270  reg_size = register_size (gdbarch, argreg);
1271  regval = extract_unsigned_integer (val, reg_size, byte_order);
1272  regcache_cooked_write_unsigned (regcache, argreg++, regval);
1273  }
1274  /* Store the value reg_size bytes at a time. This means that things
1275  larger than reg_size bytes may go partly in registers and partly
1276  on the stack. */
1277  len -= reg_size;
1278  val += reg_size;
1279  }
1280  }
1281 
1282  if (struct_return)
1283  {
1285  /* If the function uses the Renesas ABI, subtract another 4 bytes from
1286  the stack and store the struct return address there. */
1287  write_memory_unsigned_integer (sp -= 4, 4, byte_order, struct_addr);
1288  else
1289  /* Using the gcc ABI, the "struct return pointer" pseudo-argument has
1290  its own dedicated register. */
1292  STRUCT_RETURN_REGNUM, struct_addr);
1293  }
1294 
1295  /* Store return address. */
1297 
1298  /* Update stack pointer. */
1300  gdbarch_sp_regnum (gdbarch), sp);
1301 
1302  return sp;
1303 }
1304 
1305 /* Find a function's return value in the appropriate registers (in
1306  regbuf), and copy it into valbuf. Extract from an array REGBUF
1307  containing the (raw) register state a function return value of type
1308  TYPE, and copy that, in virtual format, into VALBUF. */
1309 static void
1311  gdb_byte *valbuf)
1312 {
1313  struct gdbarch *gdbarch = regcache->arch ();
1314  enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1315  int len = TYPE_LENGTH (type);
1316 
1317  if (len <= 4)
1318  {
1319  ULONGEST c;
1320 
1322  store_unsigned_integer (valbuf, len, byte_order, c);
1323  }
1324  else if (len == 8)
1325  {
1326  int i, regnum = R0_REGNUM;
1327  for (i = 0; i < len; i += 4)
1328  regcache_raw_read (regcache, regnum++, valbuf + i);
1329  }
1330  else
1331  error (_("bad size for return value"));
1332 }
1333 
1334 static void
1336  gdb_byte *valbuf)
1337 {
1338  struct gdbarch *gdbarch = regcache->arch ();
1339  if (sh_treat_as_flt_p (type))
1340  {
1341  int len = TYPE_LENGTH (type);
1342  int i, regnum = gdbarch_fp0_regnum (gdbarch);
1343  for (i = 0; i < len; i += 4)
1344  if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_LITTLE)
1346  valbuf + len - 4 - i);
1347  else
1348  regcache_raw_read (regcache, regnum++, valbuf + i);
1349  }
1350  else
1352 }
1353 
1354 /* Write into appropriate registers a function return value
1355  of type TYPE, given in virtual format.
1356  If the architecture is sh4 or sh3e, store a function's return value
1357  in the R0 general register or in the FP0 floating point register,
1358  depending on the type of the return value. In all the other cases
1359  the result is stored in r0, left-justified. */
1360 static void
1362  const gdb_byte *valbuf)
1363 {
1364  struct gdbarch *gdbarch = regcache->arch ();
1365  enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1366  ULONGEST val;
1367  int len = TYPE_LENGTH (type);
1368 
1369  if (len <= 4)
1370  {
1371  val = extract_unsigned_integer (valbuf, len, byte_order);
1373  }
1374  else
1375  {
1376  int i, regnum = R0_REGNUM;
1377  for (i = 0; i < len; i += 4)
1378  regcache_raw_write (regcache, regnum++, valbuf + i);
1379  }
1380 }
1381 
1382 static void
1384  const gdb_byte *valbuf)
1385 {
1386  struct gdbarch *gdbarch = regcache->arch ();
1387  if (sh_treat_as_flt_p (type))
1388  {
1389  int len = TYPE_LENGTH (type);
1390  int i, regnum = gdbarch_fp0_regnum (gdbarch);
1391  for (i = 0; i < len; i += 4)
1392  if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_LITTLE)
1394  valbuf + len - 4 - i);
1395  else
1396  regcache_raw_write (regcache, regnum++, valbuf + i);
1397  }
1398  else
1400 }
1401 
1402 static enum return_value_convention
1403 sh_return_value_nofpu (struct gdbarch *gdbarch, struct value *function,
1404  struct type *type, struct regcache *regcache,
1405  gdb_byte *readbuf, const gdb_byte *writebuf)
1406 {
1407  struct type *func_type = function ? value_type (function) : NULL;
1408 
1412  if (writebuf)
1414  else if (readbuf)
1417 }
1418 
1419 static enum return_value_convention
1420 sh_return_value_fpu (struct gdbarch *gdbarch, struct value *function,
1421  struct type *type, struct regcache *regcache,
1422  gdb_byte *readbuf, const gdb_byte *writebuf)
1423 {
1424  struct type *func_type = function ? value_type (function) : NULL;
1425 
1429  if (writebuf)
1431  else if (readbuf)
1434 }
1435 
1436 static struct type *
1438 {
1439  if ((reg_nr >= gdbarch_fp0_regnum (gdbarch)
1440  && (reg_nr <= FP_LAST_REGNUM)) || (reg_nr == FPUL_REGNUM))
1442  else if (reg_nr >= DR0_REGNUM && reg_nr <= DR_LAST_REGNUM)
1444  else
1445  return builtin_type (gdbarch)->builtin_int;
1446 }
1447 
1448 /* Return the GDB type object for the "standard" data type
1449  of data in register N. */
1450 static struct type *
1452 {
1453  if ((reg_nr >= gdbarch_fp0_regnum (gdbarch)
1454  && (reg_nr <= FP_LAST_REGNUM)) || (reg_nr == FPUL_REGNUM))
1456  else
1457  return builtin_type (gdbarch)->builtin_int;
1458 }
1459 
1460 static struct type *
1462 {
1463  return lookup_array_range_type (builtin_type (gdbarch)->builtin_float,
1464  0, high);
1465 }
1466 
1467 static struct type *
1468 sh_sh4_register_type (struct gdbarch *gdbarch, int reg_nr)
1469 {
1470  if ((reg_nr >= gdbarch_fp0_regnum (gdbarch)
1471  && (reg_nr <= FP_LAST_REGNUM)) || (reg_nr == FPUL_REGNUM))
1473  else if (reg_nr >= DR0_REGNUM && reg_nr <= DR_LAST_REGNUM)
1475  else if (reg_nr >= FV0_REGNUM && reg_nr <= FV_LAST_REGNUM)
1477  else
1478  return builtin_type (gdbarch)->builtin_int;
1479 }
1480 
1481 static struct type *
1483 {
1484  return builtin_type (gdbarch)->builtin_int;
1485 }
1486 
1487 /* Is a register in a reggroup?
1488  The default code in reggroup.c doesn't identify system registers, some
1489  float registers or any of the vector registers.
1490  TODO: sh2a and dsp registers. */
1491 static int
1493  struct reggroup *reggroup)
1494 {
1495  if (gdbarch_register_name (gdbarch, regnum) == NULL
1496  || *gdbarch_register_name (gdbarch, regnum) == '\0')
1497  return 0;
1498 
1499  if (reggroup == float_reggroup
1500  && (regnum == FPUL_REGNUM
1501  || regnum == FPSCR_REGNUM))
1502  return 1;
1503 
1504  if (regnum >= FV0_REGNUM && regnum <= FV_LAST_REGNUM)
1505  {
1507  return 1;
1508  if (reggroup == general_reggroup)
1509  return 0;
1510  }
1511 
1512  if (regnum == VBR_REGNUM
1513  || regnum == SR_REGNUM
1514  || regnum == FPSCR_REGNUM
1515  || regnum == SSR_REGNUM
1516  || regnum == SPC_REGNUM)
1517  {
1518  if (reggroup == system_reggroup)
1519  return 1;
1520  if (reggroup == general_reggroup)
1521  return 0;
1522  }
1523 
1524  /* The default code can cope with any other registers. */
1526 }
1527 
1528 /* On the sh4, the DRi pseudo registers are problematic if the target
1529  is little endian. When the user writes one of those registers, for
1530  instance with 'set var $dr0=1', we want the double to be stored
1531  like this:
1532  fr0 = 0x00 0x00 0xf0 0x3f
1533  fr1 = 0x00 0x00 0x00 0x00
1534 
1535  This corresponds to little endian byte order & big endian word
1536  order. However if we let gdb write the register w/o conversion, it
1537  will write fr0 and fr1 this way:
1538  fr0 = 0x00 0x00 0x00 0x00
1539  fr1 = 0x00 0x00 0xf0 0x3f
1540  because it will consider fr0 and fr1 as a single LE stretch of memory.
1541 
1542  To achieve what we want we must force gdb to store things in
1543  floatformat_ieee_double_littlebyte_bigword (which is defined in
1544  include/floatformat.h and libiberty/floatformat.c.
1545 
1546  In case the target is big endian, there is no problem, the
1547  raw bytes will look like:
1548  fr0 = 0x3f 0xf0 0x00 0x00
1549  fr1 = 0x00 0x00 0x00 0x00
1550 
1551  The other pseudo registers (the FVs) also don't pose a problem
1552  because they are stored as 4 individual FP elements. */
1553 
1554 static struct type *
1556 {
1557  struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1558 
1559  if (tdep->sh_littlebyte_bigword_type == NULL)
1561  = arch_float_type (gdbarch, -1, "builtin_type_sh_littlebyte_bigword",
1563 
1564  return tdep->sh_littlebyte_bigword_type;
1565 }
1566 
1567 static void
1569  struct type *type, gdb_byte *from, gdb_byte *to)
1570 {
1571  if (gdbarch_byte_order (gdbarch) != BFD_ENDIAN_LITTLE)
1572  {
1573  /* It is a no-op. */
1574  memcpy (to, from, register_size (gdbarch, regnum));
1575  return;
1576  }
1577 
1578  if (regnum >= DR0_REGNUM && regnum <= DR_LAST_REGNUM)
1580  to, type);
1581  else
1582  error
1583  ("sh_register_convert_to_virtual called with non DR register number");
1584 }
1585 
1586 static void
1588  int regnum, const gdb_byte *from, gdb_byte *to)
1589 {
1590  if (gdbarch_byte_order (gdbarch) != BFD_ENDIAN_LITTLE)
1591  {
1592  /* It is a no-op. */
1593  memcpy (to, from, register_size (gdbarch, regnum));
1594  return;
1595  }
1596 
1597  if (regnum >= DR0_REGNUM && regnum <= DR_LAST_REGNUM)
1598  target_float_convert (from, type,
1600  else
1601  error (_("sh_register_convert_to_raw called with non DR register number"));
1602 }
1603 
1604 /* For vectors of 4 floating point registers. */
1605 static int
1606 fv_reg_base_num (struct gdbarch *gdbarch, int fv_regnum)
1607 {
1608  int fp_regnum;
1609 
1611  + (fv_regnum - FV0_REGNUM) * 4;
1612  return fp_regnum;
1613 }
1614 
1615 /* For double precision floating point registers, i.e 2 fp regs. */
1616 static int
1617 dr_reg_base_num (struct gdbarch *gdbarch, int dr_regnum)
1618 {
1619  int fp_regnum;
1620 
1622  + (dr_regnum - DR0_REGNUM) * 2;
1623  return fp_regnum;
1624 }
1625 
1626 /* Concatenate PORTIONS contiguous raw registers starting at
1627  BASE_REGNUM into BUFFER. */
1628 
1629 static enum register_status
1631  struct regcache *regcache,
1632  int portions,
1633  int base_regnum, gdb_byte *buffer)
1634 {
1635  int portion;
1636 
1637  for (portion = 0; portion < portions; portion++)
1638  {
1639  enum register_status status;
1640  gdb_byte *b;
1641 
1642  b = buffer + register_size (gdbarch, base_regnum) * portion;
1643  status = regcache_raw_read (regcache, base_regnum + portion, b);
1644  if (status != REG_VALID)
1645  return status;
1646  }
1647 
1648  return REG_VALID;
1649 }
1650 
1651 static enum register_status
1653  int reg_nr, gdb_byte *buffer)
1654 {
1655  int base_regnum;
1656  enum register_status status;
1657 
1658  if (reg_nr == PSEUDO_BANK_REGNUM)
1660  else if (reg_nr >= DR0_REGNUM && reg_nr <= DR_LAST_REGNUM)
1661  {
1662  /* Enough space for two float registers. */
1663  gdb_byte temp_buffer[4 * 2];
1664  base_regnum = dr_reg_base_num (gdbarch, reg_nr);
1665 
1666  /* Build the value in the provided buffer. */
1667  /* Read the real regs for which this one is an alias. */
1669  2, base_regnum, temp_buffer);
1670  if (status == REG_VALID)
1671  {
1672  /* We must pay attention to the endiannes. */
1674  register_type (gdbarch, reg_nr),
1675  temp_buffer, buffer);
1676  }
1677  return status;
1678  }
1679  else if (reg_nr >= FV0_REGNUM && reg_nr <= FV_LAST_REGNUM)
1680  {
1681  base_regnum = fv_reg_base_num (gdbarch, reg_nr);
1682 
1683  /* Read the real regs for which this one is an alias. */
1685  4, base_regnum, buffer);
1686  }
1687  else
1688  gdb_assert_not_reached ("invalid pseudo register number");
1689 }
1690 
1691 static void
1693  int reg_nr, const gdb_byte *buffer)
1694 {
1695  int base_regnum, portion;
1696 
1697  if (reg_nr == PSEUDO_BANK_REGNUM)
1698  {
1699  /* When the bank register is written to, the whole register bank
1700  is switched and all values in the bank registers must be read
1701  from the target/sim again. We're just invalidating the regcache
1702  so that a re-read happens next time it's necessary. */
1703  int bregnum;
1704 
1706  for (bregnum = R0_BANK0_REGNUM; bregnum < MACLB_REGNUM; ++bregnum)
1707  regcache_invalidate (regcache, bregnum);
1708  }
1709  else if (reg_nr >= DR0_REGNUM && reg_nr <= DR_LAST_REGNUM)
1710  {
1711  /* Enough space for two float registers. */
1712  gdb_byte temp_buffer[4 * 2];
1713  base_regnum = dr_reg_base_num (gdbarch, reg_nr);
1714 
1715  /* We must pay attention to the endiannes. */
1717  reg_nr, buffer, temp_buffer);
1718 
1719  /* Write the real regs for which this one is an alias. */
1720  for (portion = 0; portion < 2; portion++)
1721  regcache_raw_write (regcache, base_regnum + portion,
1722  (temp_buffer
1724  base_regnum) * portion));
1725  }
1726  else if (reg_nr >= FV0_REGNUM && reg_nr <= FV_LAST_REGNUM)
1727  {
1728  base_regnum = fv_reg_base_num (gdbarch, reg_nr);
1729 
1730  /* Write the real regs for which this one is an alias. */
1731  for (portion = 0; portion < 4; portion++)
1732  regcache_raw_write (regcache, base_regnum + portion,
1733  (buffer
1735  base_regnum) * portion));
1736  }
1737 }
1738 
1739 static int
1741 {
1742  if (legacy_register_sim_regno (gdbarch, nr) < 0)
1743  return legacy_register_sim_regno (gdbarch, nr);
1744  if (nr >= DSR_REGNUM && nr <= Y1_REGNUM)
1745  return nr - DSR_REGNUM + SIM_SH_DSR_REGNUM;
1746  if (nr == MOD_REGNUM)
1747  return SIM_SH_MOD_REGNUM;
1748  if (nr == RS_REGNUM)
1749  return SIM_SH_RS_REGNUM;
1750  if (nr == RE_REGNUM)
1751  return SIM_SH_RE_REGNUM;
1752  if (nr >= DSP_R0_BANK_REGNUM && nr <= DSP_R7_BANK_REGNUM)
1753  return nr - DSP_R0_BANK_REGNUM + SIM_SH_R0_BANK_REGNUM;
1754  return nr;
1755 }
1756 
1757 static int
1759 {
1760  switch (nr)
1761  {
1762  case TBR_REGNUM:
1763  return SIM_SH_TBR_REGNUM;
1764  case IBNR_REGNUM:
1765  return SIM_SH_IBNR_REGNUM;
1766  case IBCR_REGNUM:
1767  return SIM_SH_IBCR_REGNUM;
1768  case BANK_REGNUM:
1769  return SIM_SH_BANK_REGNUM;
1770  case MACLB_REGNUM:
1771  return SIM_SH_BANK_MACL_REGNUM;
1772  case GBRB_REGNUM:
1773  return SIM_SH_BANK_GBR_REGNUM;
1774  case PRB_REGNUM:
1775  return SIM_SH_BANK_PR_REGNUM;
1776  case IVNB_REGNUM:
1777  return SIM_SH_BANK_IVN_REGNUM;
1778  case MACHB_REGNUM:
1779  return SIM_SH_BANK_MACH_REGNUM;
1780  default:
1781  break;
1782  }
1783  return legacy_register_sim_regno (gdbarch, nr);
1784 }
1785 
1786 /* Set up the register unwinding such that call-clobbered registers are
1787  not displayed in frames >0 because the true value is not certain.
1788  The 'undefined' registers will show up as 'not available' unless the
1789  CFI says otherwise.
1790 
1791  This function is currently set up for SH4 and compatible only. */
1792 
1793 static void
1795  struct dwarf2_frame_state_reg *reg,
1796  struct frame_info *this_frame)
1797 {
1798  /* Mark the PC as the destination for the return address. */
1799  if (regnum == gdbarch_pc_regnum (gdbarch))
1800  reg->how = DWARF2_FRAME_REG_RA;
1801 
1802  /* Mark the stack pointer as the call frame address. */
1803  else if (regnum == gdbarch_sp_regnum (gdbarch))
1804  reg->how = DWARF2_FRAME_REG_CFA;
1805 
1806  /* The above was taken from the default init_reg in dwarf2-frame.c
1807  while the below is SH specific. */
1808 
1809  /* Caller save registers. */
1810  else if ((regnum >= R0_REGNUM && regnum <= R0_REGNUM+7)
1811  || (regnum >= FR0_REGNUM && regnum <= FR0_REGNUM+11)
1812  || (regnum >= DR0_REGNUM && regnum <= DR0_REGNUM+5)
1813  || (regnum >= FV0_REGNUM && regnum <= FV0_REGNUM+2)
1814  || (regnum == MACH_REGNUM)
1815  || (regnum == MACL_REGNUM)
1816  || (regnum == FPUL_REGNUM)
1817  || (regnum == SR_REGNUM))
1819 
1820  /* Callee save registers. */
1821  else if ((regnum >= R0_REGNUM+8 && regnum <= R0_REGNUM+15)
1822  || (regnum >= FR0_REGNUM+12 && regnum <= FR0_REGNUM+15)
1823  || (regnum >= DR0_REGNUM+6 && regnum <= DR0_REGNUM+8)
1824  || (regnum == FV0_REGNUM+3))
1826 
1827  /* Other registers. These are not in the ABI and may or may not
1828  mean anything in frames >0 so don't show them. */
1829  else if ((regnum >= R0_BANK0_REGNUM && regnum <= R0_BANK0_REGNUM+15)
1830  || (regnum == GBR_REGNUM)
1831  || (regnum == VBR_REGNUM)
1832  || (regnum == FPSCR_REGNUM)
1833  || (regnum == SSR_REGNUM)
1834  || (regnum == SPC_REGNUM))
1836 }
1837 
1838 static struct sh_frame_cache *
1840 {
1841  struct sh_frame_cache *cache;
1842  int i;
1843 
1844  cache = FRAME_OBSTACK_ZALLOC (struct sh_frame_cache);
1845 
1846  /* Base address. */
1847  cache->base = 0;
1848  cache->saved_sp = 0;
1849  cache->sp_offset = 0;
1850  cache->pc = 0;
1851 
1852  /* Frameless until proven otherwise. */
1853  cache->uses_fp = 0;
1854 
1855  /* Saved registers. We initialize these to -1 since zero is a valid
1856  offset (that's where fp is supposed to be stored). */
1857  for (i = 0; i < SH_NUM_REGS; i++)
1858  {
1859  cache->saved_regs[i] = -1;
1860  }
1861 
1862  return cache;
1863 }
1864 
1865 static struct sh_frame_cache *
1866 sh_frame_cache (struct frame_info *this_frame, void **this_cache)
1867 {
1868  struct gdbarch *gdbarch = get_frame_arch (this_frame);
1869  struct sh_frame_cache *cache;
1870  CORE_ADDR current_pc;
1871  int i;
1872 
1873  if (*this_cache)
1874  return (struct sh_frame_cache *) *this_cache;
1875 
1876  cache = sh_alloc_frame_cache ();
1877  *this_cache = cache;
1878 
1879  /* In principle, for normal frames, fp holds the frame pointer,
1880  which holds the base address for the current stack frame.
1881  However, for functions that don't need it, the frame pointer is
1882  optional. For these "frameless" functions the frame pointer is
1883  actually the frame pointer of the calling frame. */
1884  cache->base = get_frame_register_unsigned (this_frame, FP_REGNUM);
1885  if (cache->base == 0)
1886  return cache;
1887 
1888  cache->pc = get_frame_func (this_frame);
1889  current_pc = get_frame_pc (this_frame);
1890  if (cache->pc != 0)
1891  {
1892  ULONGEST fpscr;
1893 
1894  /* Check for the existence of the FPSCR register. If it exists,
1895  fetch its value for use in prologue analysis. Passing a zero
1896  value is the best choice for architecture variants upon which
1897  there's no FPSCR register. */
1899  fpscr = get_frame_register_unsigned (this_frame, FPSCR_REGNUM);
1900  else
1901  fpscr = 0;
1902 
1903  sh_analyze_prologue (gdbarch, cache->pc, current_pc, cache, fpscr);
1904  }
1905 
1906  if (!cache->uses_fp)
1907  {
1908  /* We didn't find a valid frame, which means that CACHE->base
1909  currently holds the frame pointer for our calling frame. If
1910  we're at the start of a function, or somewhere half-way its
1911  prologue, the function's frame probably hasn't been fully
1912  setup yet. Try to reconstruct the base address for the stack
1913  frame by looking at the stack pointer. For truly "frameless"
1914  functions this might work too. */
1916  (this_frame, gdbarch_sp_regnum (gdbarch));
1917  }
1918 
1919  /* Now that we have the base address for the stack frame we can
1920  calculate the value of sp in the calling frame. */
1921  cache->saved_sp = cache->base + cache->sp_offset;
1922 
1923  /* Adjust all the saved registers such that they contain addresses
1924  instead of offsets. */
1925  for (i = 0; i < SH_NUM_REGS; i++)
1926  if (cache->saved_regs[i] != -1)
1927  cache->saved_regs[i] = cache->saved_sp - cache->saved_regs[i] - 4;
1928 
1929  return cache;
1930 }
1931 
1932 static struct value *
1934  void **this_cache, int regnum)
1935 {
1936  struct gdbarch *gdbarch = get_frame_arch (this_frame);
1937  struct sh_frame_cache *cache = sh_frame_cache (this_frame, this_cache);
1938 
1939  gdb_assert (regnum >= 0);
1940 
1941  if (regnum == gdbarch_sp_regnum (gdbarch) && cache->saved_sp)
1942  return frame_unwind_got_constant (this_frame, regnum, cache->saved_sp);
1943 
1944  /* The PC of the previous frame is stored in the PR register of
1945  the current frame. Frob regnum so that we pull the value from
1946  the correct place. */
1947  if (regnum == gdbarch_pc_regnum (gdbarch))
1948  regnum = PR_REGNUM;
1949 
1950  if (regnum < SH_NUM_REGS && cache->saved_regs[regnum] != -1)
1951  return frame_unwind_got_memory (this_frame, regnum,
1952  cache->saved_regs[regnum]);
1953 
1954  return frame_unwind_got_register (this_frame, regnum, regnum);
1955 }
1956 
1957 static void
1958 sh_frame_this_id (struct frame_info *this_frame, void **this_cache,
1959  struct frame_id *this_id)
1960 {
1961  struct sh_frame_cache *cache = sh_frame_cache (this_frame, this_cache);
1962 
1963  /* This marks the outermost frame. */
1964  if (cache->base == 0)
1965  return;
1966 
1967  *this_id = frame_id_build (cache->saved_sp, cache->pc);
1968 }
1969 
1970 static const struct frame_unwind sh_frame_unwind = {
1971  NORMAL_FRAME,
1975  NULL,
1977 };
1978 
1979 static CORE_ADDR
1980 sh_unwind_sp (struct gdbarch *gdbarch, struct frame_info *next_frame)
1981 {
1982  return frame_unwind_register_unsigned (next_frame,
1984 }
1985 
1986 static CORE_ADDR
1987 sh_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
1988 {
1989  return frame_unwind_register_unsigned (next_frame,
1991 }
1992 
1993 static struct frame_id
1994 sh_dummy_id (struct gdbarch *gdbarch, struct frame_info *this_frame)
1995 {
1996  CORE_ADDR sp = get_frame_register_unsigned (this_frame,
1998  return frame_id_build (sp, get_frame_pc (this_frame));
1999 }
2000 
2001 static CORE_ADDR
2002 sh_frame_base_address (struct frame_info *this_frame, void **this_cache)
2003 {
2004  struct sh_frame_cache *cache = sh_frame_cache (this_frame, this_cache);
2005 
2006  return cache->base;
2007 }
2008 
2009 static const struct frame_base sh_frame_base = {
2010  &sh_frame_unwind,
2014 };
2015 
2016 static struct sh_frame_cache *
2017 sh_make_stub_cache (struct frame_info *this_frame)
2018 {
2019  struct gdbarch *gdbarch = get_frame_arch (this_frame);
2020  struct sh_frame_cache *cache;
2021 
2022  cache = sh_alloc_frame_cache ();
2023 
2024  cache->saved_sp
2026 
2027  return cache;
2028 }
2029 
2030 static void
2031 sh_stub_this_id (struct frame_info *this_frame, void **this_cache,
2032  struct frame_id *this_id)
2033 {
2034  struct sh_frame_cache *cache;
2035 
2036  if (*this_cache == NULL)
2037  *this_cache = sh_make_stub_cache (this_frame);
2038  cache = (struct sh_frame_cache *) *this_cache;
2039 
2040  *this_id = frame_id_build (cache->saved_sp, get_frame_pc (this_frame));
2041 }
2042 
2043 static int
2045  struct frame_info *this_frame,
2046  void **this_prologue_cache)
2047 {
2048  CORE_ADDR addr_in_block;
2049 
2050  addr_in_block = get_frame_address_in_block (this_frame);
2051  if (in_plt_section (addr_in_block))
2052  return 1;
2053 
2054  return 0;
2055 }
2056 
2057 static const struct frame_unwind sh_stub_unwind =
2058 {
2059  NORMAL_FRAME,
2063  NULL,
2065 };
2066 
2067 /* Implement the stack_frame_destroyed_p gdbarch method.
2068 
2069  The epilogue is defined here as the area at the end of a function,
2070  either on the `ret' instruction itself or after an instruction which
2071  destroys the function's stack frame. */
2072 
2073 static int
2075 {
2076  enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
2077  CORE_ADDR func_addr = 0, func_end = 0;
2078 
2079  if (find_pc_partial_function (pc, NULL, &func_addr, &func_end))
2080  {
2081  ULONGEST inst;
2082  /* The sh epilogue is max. 14 bytes long. Give another 14 bytes
2083  for a nop and some fixed data (e.g. big offsets) which are
2084  unfortunately also treated as part of the function (which
2085  means, they are below func_end. */
2086  CORE_ADDR addr = func_end - 28;
2087  if (addr < func_addr + 4)
2088  addr = func_addr + 4;
2089  if (pc < addr)
2090  return 0;
2091 
2092  /* First search forward until hitting an rts. */
2093  while (addr < func_end
2094  && !IS_RTS (read_memory_unsigned_integer (addr, 2, byte_order)))
2095  addr += 2;
2096  if (addr >= func_end)
2097  return 0;
2098 
2099  /* At this point we should find a mov.l @r15+,r14 instruction,
2100  either before or after the rts. If not, then the function has
2101  probably no "normal" epilogue and we bail out here. */
2102  inst = read_memory_unsigned_integer (addr - 2, 2, byte_order);
2103  if (IS_RESTORE_FP (read_memory_unsigned_integer (addr - 2, 2,
2104  byte_order)))
2105  addr -= 2;
2106  else if (!IS_RESTORE_FP (read_memory_unsigned_integer (addr + 2, 2,
2107  byte_order)))
2108  return 0;
2109 
2110  inst = read_memory_unsigned_integer (addr - 2, 2, byte_order);
2111 
2112  /* Step over possible lds.l @r15+,macl. */
2113  if (IS_MACL_LDS (inst))
2114  {
2115  addr -= 2;
2116  inst = read_memory_unsigned_integer (addr - 2, 2, byte_order);
2117  }
2118 
2119  /* Step over possible lds.l @r15+,pr. */
2120  if (IS_LDS (inst))
2121  {
2122  addr -= 2;
2123  inst = read_memory_unsigned_integer (addr - 2, 2, byte_order);
2124  }
2125 
2126  /* Step over possible mov r14,r15. */
2127  if (IS_MOV_FP_SP (inst))
2128  {
2129  addr -= 2;
2130  inst = read_memory_unsigned_integer (addr - 2, 2, byte_order);
2131  }
2132 
2133  /* Now check for FP adjustments, using add #imm,r14 or add rX, r14
2134  instructions. */
2135  while (addr > func_addr + 4
2136  && (IS_ADD_REG_TO_FP (inst) || IS_ADD_IMM_FP (inst)))
2137  {
2138  addr -= 2;
2139  inst = read_memory_unsigned_integer (addr - 2, 2, byte_order);
2140  }
2141 
2142  /* On SH2a check if the previous instruction was perhaps a MOVI20.
2143  That's allowed for the epilogue. */
2144  if ((gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_sh2a
2145  || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_sh2a_nofpu)
2146  && addr > func_addr + 6
2147  && IS_MOVI20 (read_memory_unsigned_integer (addr - 4, 2,
2148  byte_order)))
2149  addr -= 4;
2150 
2151  if (pc >= addr)
2152  return 1;
2153  }
2154  return 0;
2155 }
2156 
2157 
2158 /* Supply register REGNUM from the buffer specified by REGS and LEN
2159  in the register set REGSET to register cache REGCACHE.
2160  REGTABLE specifies where each register can be found in REGS.
2161  If REGNUM is -1, do this for all registers in REGSET. */
2162 
2163 void
2165  struct regcache *regcache,
2166  int regnum, const void *regs, size_t len)
2167 {
2168  struct gdbarch *gdbarch = regcache->arch ();
2169  struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2171  ? tdep->core_gregmap
2172  : tdep->core_fpregmap);
2173  int i;
2174 
2175  for (i = 0; regmap[i].regnum != -1; i++)
2176  {
2177  if ((regnum == -1 || regnum == regmap[i].regnum)
2178  && regmap[i].offset + 4 <= len)
2180  (char *)regs + regmap[i].offset);
2181  }
2182 }
2183 
2184 /* Collect register REGNUM in the register set REGSET from register cache
2185  REGCACHE into the buffer specified by REGS and LEN.
2186  REGTABLE specifies where each register can be found in REGS.
2187  If REGNUM is -1, do this for all registers in REGSET. */
2188 
2189 void
2191  const struct regcache *regcache,
2192  int regnum, void *regs, size_t len)
2193 {
2194  struct gdbarch *gdbarch = regcache->arch ();
2195  struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2197  ? tdep->core_gregmap
2198  : tdep->core_fpregmap);
2199  int i;
2200 
2201  for (i = 0; regmap[i].regnum != -1; i++)
2202  {
2203  if ((regnum == -1 || regnum == regmap[i].regnum)
2204  && regmap[i].offset + 4 <= len)
2206  (char *)regs + regmap[i].offset);
2207  }
2208 }
2209 
2210 /* The following two regsets have the same contents, so it is tempting to
2211  unify them, but they are distiguished by their address, so don't. */
2212 
2214 {
2215  NULL,
2218 };
2219 
2220 static const struct regset sh_corefile_fpregset =
2221 {
2222  NULL,
2225 };
2226 
2227 static void
2230  void *cb_data,
2231  const struct regcache *regcache)
2232 {
2233  struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2234 
2235  if (tdep->core_gregmap != NULL)
2236  cb (".reg", tdep->sizeof_gregset, &sh_corefile_gregset, NULL, cb_data);
2237 
2238  if (tdep->core_fpregmap != NULL)
2239  cb (".reg2", tdep->sizeof_fpregset, &sh_corefile_fpregset, NULL, cb_data);
2240 }
2241 
2242 /* This is the implementation of gdbarch method
2243  return_in_first_hidden_param_p. */
2244 
2245 static int
2247  struct type *type)
2248 {
2249  return 0;
2250 }
2251 
2252 
2253 
2254 static struct gdbarch *
2255 sh_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
2256 {
2257  struct gdbarch *gdbarch;
2258  struct gdbarch_tdep *tdep;
2259 
2260  /* SH5 is handled entirely in sh64-tdep.c. */
2261  if (info.bfd_arch_info->mach == bfd_mach_sh5)
2262  return sh64_gdbarch_init (info, arches);
2263 
2264  /* If there is already a candidate, use it. */
2265  arches = gdbarch_list_lookup_by_info (arches, &info);
2266  if (arches != NULL)
2267  return arches->gdbarch;
2268 
2269  /* None found, create a new architecture from the information
2270  provided. */
2271  tdep = XCNEW (struct gdbarch_tdep);
2272  gdbarch = gdbarch_alloc (&info, tdep);
2273 
2278 
2281 
2286 
2292 
2295 
2298 
2300 
2302 
2305 
2309 
2311 
2317 
2319 
2321 
2324 
2325  switch (info.bfd_arch_info->mach)
2326  {
2327  case bfd_mach_sh:
2329  break;
2330 
2331  case bfd_mach_sh2:
2333  break;
2334 
2335  case bfd_mach_sh2e:
2336  /* doubles on sh2e and sh3e are actually 4 byte. */
2339 
2345  break;
2346 
2347  case bfd_mach_sh2a:
2351 
2358  break;
2359 
2360  case bfd_mach_sh2a_nofpu:
2363 
2367  break;
2368 
2369  case bfd_mach_sh_dsp:
2372  break;
2373 
2374  case bfd_mach_sh3:
2375  case bfd_mach_sh3_nommu:
2376  case bfd_mach_sh2a_nofpu_or_sh3_nommu:
2378  break;
2379 
2380  case bfd_mach_sh3e:
2381  case bfd_mach_sh2a_or_sh3e:
2382  /* doubles on sh2e and sh3e are actually 4 byte. */
2385 
2391  break;
2392 
2393  case bfd_mach_sh3_dsp:
2396  break;
2397 
2398  case bfd_mach_sh4:
2399  case bfd_mach_sh4a:
2400  case bfd_mach_sh2a_or_sh4:
2409  break;
2410 
2411  case bfd_mach_sh4_nofpu:
2412  case bfd_mach_sh4a_nofpu:
2413  case bfd_mach_sh4_nommu_nofpu:
2414  case bfd_mach_sh2a_nofpu_or_sh4_nommu_nofpu:
2416  break;
2417 
2418  case bfd_mach_sh4al_dsp:
2421  break;
2422 
2423  default:
2425  break;
2426  }
2427 
2428  /* Hook in ABI-specific overrides, if they have been registered. */
2429  gdbarch_init_osabi (info, gdbarch);
2430 
2434 
2435  return gdbarch;
2436 }
2437 
2438 static void
2439 show_sh_command (const char *args, int from_tty)
2440 {
2442 }
2443 
2444 static void
2445 set_sh_command (const char *args, int from_tty)
2446 {
2448  ("\"set sh\" must be followed by an appropriate subcommand.\n");
2450 }
2451 
2452 void
2454 {
2455  gdbarch_register (bfd_arch_sh, sh_gdbarch_init, NULL);
2456 
2457  add_prefix_cmd ("sh", no_class, set_sh_command, "SH specific commands.",
2458  &setshcmdlist, "set sh ", 0, &setlist);
2459  add_prefix_cmd ("sh", no_class, show_sh_command, "SH specific commands.",
2460  &showshcmdlist, "show sh ", 0, &showlist);
2461 
2462  add_setshow_enum_cmd ("calling-convention", class_vars, sh_cc_enum,
2464  _("Set calling convention used when calling target "
2465  "functions from GDB."),
2466  _("Show calling convention used when calling target "
2467  "functions from GDB."),
2468  _("gcc - Use GCC calling convention (default).\n"
2469  "renesas - Enforce Renesas calling convention."),
2470  NULL, NULL,
2472 }
void set_gdbarch_num_regs(struct gdbarch *gdbarch, int num_regs)
Definition: gdbarch.c:2050
void set_gdbarch_double_bit(struct gdbarch *gdbarch, int double_bit)
Definition: gdbarch.c:1723
void set_gdbarch_frame_align(struct gdbarch *gdbarch, gdbarch_frame_align_ftype frame_align)
Definition: gdbarch.c:3151
#define IS_MOVI20(x)
Definition: sh-tdep.c:527
#define GET_TARGET_REG(x)
Definition: sh-tdep.c:466
#define IS_MOV_FP_SP(x)
Definition: sh-tdep.c:538
#define IS_MOVL_PCREL_TO_REG(x)
Definition: sh-tdep.c:525
static const gdb_byte * sh_sw_breakpoint_from_kind(struct gdbarch *gdbarch, int kind, int *size)
Definition: sh-tdep.c:431
#define IS_MOV_ARG_TO_IND_R14(x)
Definition: sh-tdep.c:512
static int sh_register_reggroup_p(struct gdbarch *gdbarch, int regnum, struct reggroup *reggroup)
Definition: sh-tdep.c:1492
struct type * lookup_array_range_type(struct type *element_type, LONGEST low_bound, LONGEST high_bound)
Definition: gdbtypes.c:1232
static void pass_on_stack(struct aarch64_call_info *info, struct type *type, struct value *arg)
static const struct frame_base sh_frame_base
Definition: sh-tdep.c:2009
struct frame_id frame_id_build(CORE_ADDR stack_addr, CORE_ADDR code_addr)
Definition: frame.c:624
static int sh_treat_as_flt_p(struct type *type)
Definition: sh-tdep.c:1041
CORE_ADDR get_frame_address_in_block(struct frame_info *this_frame)
Definition: frame.c:2407
static CORE_ADDR sh_analyze_prologue(struct gdbarch *gdbarch, CORE_ADDR pc, CORE_ADDR limit_pc, struct sh_frame_cache *cache, ULONGEST fpscr)
Definition: sh-tdep.c:543
static struct type * sh_default_register_type(struct gdbarch *gdbarch, int reg_nr)
Definition: sh-tdep.c:1482
#define IS_MACL_STS(x)
Definition: sh-tdep.c:477
void set_gdbarch_float_bit(struct gdbarch *gdbarch, int float_bit)
Definition: gdbarch.c:1690
CORE_ADDR get_frame_pc(struct frame_info *frame)
Definition: frame.c:2376
void set_gdbarch_fp0_regnum(struct gdbarch *gdbarch, int fp0_regnum)
Definition: gdbarch.c:2207
bfd_vma CORE_ADDR
Definition: common-types.h:41
#define IS_MOV_ARG_TO_IND_R14_WITH_DISP(x)
Definition: sh-tdep.c:517
#define IS_MOV_ARG_TO_REG(x)
Definition: sh-tdep.c:507
void gdbarch_init_osabi(struct gdbarch_info info, struct gdbarch *gdbarch)
Definition: osabi.c:334
#define target_shortname
Definition: target.h:1279
#define IS_FPUSH(x)
Definition: sh-tdep.c:504
#define IS_MOVW_PCREL_TO_REG(x)
Definition: sh-tdep.c:523
void set_gdbarch_wchar_bit(struct gdbarch *gdbarch, int wchar_bit)
Definition: gdbarch.c:1789
static void sh_store_return_value_nofpu(struct type *type, struct regcache *regcache, const gdb_byte *valbuf)
Definition: sh-tdep.c:1361
static int dr_reg_base_num(struct gdbarch *gdbarch, int dr_regnum)
Definition: sh-tdep.c:1617
struct value * frame_unwind_got_memory(struct frame_info *frame, int regnum, CORE_ADDR addr)
Definition: frame-unwind.c:233
void write_memory_unsigned_integer(CORE_ADDR addr, int len, enum bfd_endian byte_order, ULONGEST value)
Definition: corefile.c:417
void sh_corefile_supply_regset(const struct regset *regset, struct regcache *regcache, int regnum, const void *regs, size_t len)
Definition: sh-tdep.c:2164
#define INT_MAX
Definition: defs.h:477
void() iterate_over_regset_sections_cb(const char *sect_name, int size, const struct regset *regset, const char *human_name, void *cb_data)
Definition: gdbarch.h:99
static CORE_ADDR sh_push_dummy_call_fpu(struct gdbarch *gdbarch, struct value *function, struct regcache *regcache, CORE_ADDR bp_addr, int nargs, struct value **args, CORE_ADDR sp, int struct_return, CORE_ADDR struct_addr)
Definition: sh-tdep.c:1061
static enum register_status sh_pseudo_register_read(struct gdbarch *gdbarch, struct regcache *regcache, int reg_nr, gdb_byte *buffer)
Definition: sh-tdep.c:1652
#define IS_MOV_SP_FP(x)
Definition: sh-tdep.c:485
struct sh_corefile_regmap * core_fpregmap
Definition: sh-tdep.h:102
struct sh_corefile_regmap * core_gregmap
Definition: sh-tdep.h:97
ULONGEST frame_unwind_register_unsigned(struct frame_info *frame, int regnum)
Definition: frame.c:1279
void set_gdbarch_short_bit(struct gdbarch *gdbarch, int short_bit)
Definition: gdbarch.c:1572
#define IS_ADD_REG_TO_FP(x)
Definition: sh-tdep.c:539
#define IS_RESTORE_FP(x)
Definition: sh-tdep.c:534
static struct type * sh_sh4_build_float_register_type(struct gdbarch *gdbarch, int high)
Definition: sh-tdep.c:1461
static void sh_init_flt_argreg(void)
Definition: sh-tdep.c:954
const struct builtin_type * builtin_type(struct gdbarch *gdbarch)
Definition: gdbtypes.c:5217
void * memset(T *s, int c, size_t n)=delete
CORE_ADDR base
Definition: sh-tdep.c:75
#define IS_LDS(x)
Definition: sh-tdep.c:536
return_value_convention
Definition: defs.h:247
static struct cmd_list_element * setshcmdlist
Definition: sh-tdep.c:57
static struct value * sh_frame_prev_register(struct frame_info *this_frame, void **this_cache, int regnum)
Definition: sh-tdep.c:1933
void add_setshow_enum_cmd(const char *name, enum command_class theclass, const char *const *enumlist, const char **var, const char *set_doc, const char *show_doc, const char *help_doc, cmd_const_sfunc_ftype *set_func, show_value_ftype *show_func, struct cmd_list_element **set_list, struct cmd_list_element **show_list)
Definition: cli-decode.c:515
static const char * sh_sh_dsp_register_name(struct gdbarch *gdbarch, int reg_nr)
Definition: sh-tdep.c:279
void set_gdbarch_register_reggroup_p(struct gdbarch *gdbarch, gdbarch_register_reggroup_p_ftype register_reggroup_p)
Definition: gdbarch.c:3599
void target_float_convert(const gdb_byte *from, const struct type *from_type, gdb_byte *to, const struct type *to_type)
static struct type * sh_littlebyte_bigword_type(struct gdbarch *gdbarch)
Definition: sh-tdep.c:1555
#define IS_SHLL_R3(x)
Definition: sh-tdep.c:492
struct gdbarch_list * gdbarch_list_lookup_by_info(struct gdbarch_list *arches, const struct gdbarch_info *info)
Definition: gdbarch.c:5309
static CORE_ADDR sh_frame_base_address(struct frame_info *this_frame, void **this_cache)
Definition: sh-tdep.c:2002
register_status
CORE_ADDR skip_prologue_using_sal(struct gdbarch *gdbarch, CORE_ADDR func_addr)
Definition: symtab.c:3854
static CORE_ADDR sh_stack_allocsize(int nargs, struct value **args)
Definition: sh-tdep.c:937
CORE_ADDR saved_regs[SH_NUM_REGS]
Definition: sh-tdep.c:83
struct reggroup *const all_reggroup
Definition: reggroups.c:318
#define _(String)
Definition: gdb_locale.h:35
size_t sizeof_fpregset
Definition: i386-tdep.h:66
const struct bfd_arch_info * bfd_arch_info
Definition: gdbarch.h:1629
void set_gdbarch_return_in_first_hidden_param_p(struct gdbarch *gdbarch, gdbarch_return_in_first_hidden_param_p_ftype return_in_first_hidden_param_p)
Definition: gdbarch.c:2755
static void sh_register_convert_to_virtual(struct gdbarch *gdbarch, int regnum, struct type *type, gdb_byte *from, gdb_byte *to)
Definition: sh-tdep.c:1568
static int regmap[]
struct gdbarch_tdep * gdbarch_tdep(struct gdbarch *gdbarch)
Definition: gdbarch.c:1491
#define TYPE_FIELD_TYPE(thistype, n)
Definition: gdbtypes.h:1371
static const gdb_byte * sh_justify_value_in_reg(struct gdbarch *gdbarch, struct value *val, int len)
Definition: sh-tdep.c:918
static CORE_ADDR sh_skip_prologue(struct gdbarch *gdbarch, CORE_ADDR pc)
Definition: sh-tdep.c:727
struct type * sh_littlebyte_bigword_type
Definition: sh-tdep.h:105
void frame_unwind_append_unwinder(struct gdbarch *gdbarch, const struct frame_unwind *unwinder)
Definition: frame-unwind.c:79
static const char * sh_sh3_dsp_register_name(struct gdbarch *gdbarch, int reg_nr)
Definition: sh-tdep.c:301
void set_gdbarch_wchar_signed(struct gdbarch *gdbarch, int wchar_signed)
Definition: gdbarch.c:1807
#define FRAME_OBSTACK_ZALLOC(TYPE)
Definition: frame.h:678
#define IS_MACL_LDS(x)
Definition: sh-tdep.c:537
struct value * frame_unwind_got_constant(struct frame_info *frame, int regnum, ULONGEST val)
Definition: frame-unwind.c:246
static CORE_ADDR sh_unwind_sp(struct gdbarch *gdbarch, struct frame_info *next_frame)
Definition: sh-tdep.c:1980
struct cmd_list_element * add_prefix_cmd(const char *name, enum command_class theclass, cmd_const_cfunc_ftype *fun, const char *doc, struct cmd_list_element **prefixlist, const char *prefixname, int allow_unknown, struct cmd_list_element **list)
Definition: cli-decode.c:367
void gdbarch_register(enum bfd_architecture bfd_architecture, gdbarch_init_ftype *init, gdbarch_dump_tdep_ftype *dump_tdep)
Definition: gdbarch.c:5257
Definition: regset.h:34
static void sh_frame_this_id(struct frame_info *this_frame, void **this_cache, struct frame_id *this_id)
Definition: sh-tdep.c:1958
static void sh_iterate_over_regset_sections(struct gdbarch *gdbarch, iterate_over_regset_sections_cb *cb, void *cb_data, const struct regcache *regcache)
Definition: sh-tdep.c:2228
#define SH_NUM_REGS
Definition: sh-tdep.c:70
#define IS_SUB_REG_FROM_SP(x)
Definition: sh-tdep.c:529
static struct cmd_list_element * showshcmdlist
Definition: sh-tdep.c:58
static const char * sh_sh4al_dsp_register_name(struct gdbarch *gdbarch, int reg_nr)
Definition: sh-tdep.c:398
struct reggroup *const float_reggroup
Definition: reggroups.c:315
static CORE_ADDR sh_frame_align(struct gdbarch *ignore, CORE_ADDR sp)
Definition: sh-tdep.c:859
static void sh_pseudo_register_write(struct gdbarch *gdbarch, struct regcache *regcache, int reg_nr, const gdb_byte *buffer)
Definition: sh-tdep.c:1692
void frame_base_set_default(struct gdbarch *gdbarch, const struct frame_base *default_base)
Definition: frame-base.c:95
struct cmd_list_element * setlist
Definition: cli-cmds.c:111
static int sh_use_struct_convention(int renesas_abi, struct type *type)
Definition: sh-tdep.c:814
void set_gdbarch_pseudo_register_write(struct gdbarch *gdbarch, gdbarch_pseudo_register_write_ftype pseudo_register_write)
Definition: gdbarch.c:2032
void set_gdbarch_register_type(struct gdbarch *gdbarch, gdbarch_register_type_ftype register_type)
Definition: gdbarch.c:2316
struct type * check_typedef(struct type *type)
Definition: gdbtypes.c:2421
LONGEST read_memory_integer(CORE_ADDR memaddr, int len, enum bfd_endian byte_order)
Definition: corefile.c:316
const gdb_byte * value_contents(struct value *value)
Definition: value.c:1407
struct reggroup *const general_reggroup
Definition: reggroups.c:314
static const char * sh_sh2a_register_name(struct gdbarch *gdbarch, int reg_nr)
Definition: sh-tdep.c:199
static const char *const sh_cc_enum[]
Definition: sh-tdep.c:62
static struct type * sh_sh3e_register_type(struct gdbarch *gdbarch, int reg_nr)
Definition: sh-tdep.c:1451
int gdbarch_sp_regnum(struct gdbarch *gdbarch)
Definition: gdbarch.c:2146
void set_gdbarch_stack_frame_destroyed_p(struct gdbarch *gdbarch, gdbarch_stack_frame_destroyed_p_ftype stack_frame_destroyed_p)
Definition: gdbarch.c:3367
static ULONGEST extract_unsigned_integer(const gdb_byte *addr, int len, enum bfd_endian byte_order)
Definition: defs.h:577
enum register_status regcache_cooked_read_unsigned(struct regcache *regcache, int regnum, ULONGEST *val)
Definition: regcache.c:777
struct reggroup *const system_reggroup
Definition: reggroups.c:316
struct type * arch_float_type(struct gdbarch *gdbarch, int bit, const char *name, const struct floatformat **floatformats)
Definition: gdbtypes.c:5014
void set_gdbarch_sp_regnum(struct gdbarch *gdbarch, int sp_regnum)
Definition: gdbarch.c:2156
static const char * sh_sh3_register_name(struct gdbarch *gdbarch, int reg_nr)
Definition: sh-tdep.c:133
static int fv_reg_base_num(struct gdbarch *gdbarch, int fv_regnum)
Definition: sh-tdep.c:1606
struct type * register_type(struct gdbarch *gdbarch, int regnum)
Definition: regcache.c:152
void set_gdbarch_dummy_id(struct gdbarch *gdbarch, gdbarch_dummy_id_ftype dummy_id)
Definition: gdbarch.c:2340
static int sh_dsp_register_sim_regno(struct gdbarch *gdbarch, int nr)
Definition: sh-tdep.c:1740
static void set_sh_command(const char *args, int from_tty)
Definition: sh-tdep.c:2445
struct cmd_list_element * showlist
Definition: cli-cmds.c:119
int legacy_register_sim_regno(struct gdbarch *gdbarch, int regnum)
Definition: arch-utils.c:67
struct_return
Definition: arm-tdep.h:88
void set_gdbarch_believe_pcc_promotion(struct gdbarch *gdbarch, int believe_pcc_promotion)
Definition: gdbarch.c:2588
const struct floatformat * floatformats_ieee_double_littlebyte_bigword[BFD_ENDIAN_UNKNOWN]
Definition: gdbtypes.c:80
static struct type * sh_sh4_register_type(struct gdbarch *gdbarch, int reg_nr)
Definition: sh-tdep.c:1468
#define gdb_assert_not_reached(message)
Definition: gdb_assert.h:55
enum bfd_endian gdbarch_byte_order(struct gdbarch *gdbarch)
Definition: gdbarch.c:1509
static int sh_is_renesas_calling_convention(struct type *func_type)
Definition: sh-tdep.c:88
#define IS_ADD_IMM_FP(x)
Definition: sh-tdep.c:540
void set_gdbarch_register_sim_regno(struct gdbarch *gdbarch, gdbarch_register_sim_regno_ftype register_sim_regno)
Definition: gdbarch.c:2514
#define TARGET_CHAR_BIT
Definition: host-defs.h:29
Definition: gdbtypes.h:749
int find_pc_partial_function(CORE_ADDR pc, const char **name, CORE_ADDR *address, CORE_ADDR *endaddr)
Definition: blockframe.c:320
void set_gdbarch_unwind_pc(struct gdbarch *gdbarch, gdbarch_unwind_pc_ftype unwind_pc)
Definition: gdbarch.c:3079
static CORE_ADDR sh_unwind_pc(struct gdbarch *gdbarch, struct frame_info *next_frame)
Definition: sh-tdep.c:1987
int default_frame_sniffer(const struct frame_unwind *self, struct frame_info *this_frame, void **this_prologue_cache)
Definition: frame-unwind.c:174
static const char * type
Definition: language.c:113
static enum register_status pseudo_register_read_portions(struct gdbarch *gdbarch, struct regcache *regcache, int portions, int base_regnum, gdb_byte *buffer)
Definition: sh-tdep.c:1630
static struct sh_frame_cache * sh_make_stub_cache(struct frame_info *this_frame)
Definition: sh-tdep.c:2017
const char * gdbarch_register_name(struct gdbarch *gdbarch, int regnr)
Definition: gdbarch.c:2282
mach_port_t mach_port_t name mach_port_t mach_port_t name kern_return_t int status
Definition: gnu-nat.c:1822
static const char * sh_sh2a_nofpu_register_name(struct gdbarch *gdbarch, int reg_nr)
Definition: sh-tdep.c:239
void set_gdbarch_unwind_sp(struct gdbarch *gdbarch, gdbarch_unwind_sp_ftype unwind_sp)
Definition: gdbarch.c:3103
struct gdbarch * gdbarch
Definition: gdbarch.h:1622
int regnum
Definition: aarch64-tdep.c:77
void printf_unfiltered(const char *format,...)
Definition: utils.c:2056
static const char sh_cc_gcc[]
Definition: sh-tdep.c:60
struct reggroup *const vector_reggroup
Definition: reggroups.c:317
ULONGEST get_frame_register_unsigned(struct frame_info *frame, int regnum)
Definition: frame.c:1308
void set_gdbarch_breakpoint_kind_from_pc(struct gdbarch *gdbarch, gdbarch_breakpoint_kind_from_pc_ftype breakpoint_kind_from_pc)
Definition: gdbarch.c:2871
void set_gdbarch_long_long_bit(struct gdbarch *gdbarch, int long_long_bit)
Definition: gdbarch.c:1623
static int sh_sh2a_register_sim_regno(struct gdbarch *gdbarch, int nr)
Definition: sh-tdep.c:1758
Definition: regdef.h:22
#define gdb_assert(expr)
Definition: gdb_assert.h:32
#define IS_ADD_IMM_SP(x)
Definition: sh-tdep.c:489
Definition: value.c:169
CORE_ADDR saved_sp
Definition: sh-tdep.c:84
const struct floatformat * floatformats_ieee_single[BFD_ENDIAN_UNKNOWN]
Definition: gdbtypes.c:72
void sh_corefile_collect_regset(const struct regset *regset, const struct regcache *regcache, int regnum, void *regs, size_t len)
Definition: sh-tdep.c:2190
void regcache_invalidate(struct regcache *regcache, int regnum)
Definition: regcache.c:378
const struct regset sh_corefile_gregset
Definition: sh-tdep.c:2213
static const char * sh_sh2e_register_name(struct gdbarch *gdbarch, int reg_nr)
Definition: sh-tdep.c:177
static int sh_use_struct_convention_nofpu(int renesas_abi, struct type *type)
Definition: sh-tdep.c:850
int core_addr_lessthan(CORE_ADDR lhs, CORE_ADDR rhs)
Definition: arch-utils.c:117
bfd_byte gdb_byte
Definition: common-types.h:38
LONGEST sp_offset
Definition: sh-tdep.c:76
void help_list(struct cmd_list_element *list, const char *cmdtype, enum command_class theclass, struct ui_file *stream)
Definition: cli-decode.c:1071
static enum return_value_convention sh_return_value_fpu(struct gdbarch *gdbarch, struct value *function, struct type *type, struct regcache *regcache, gdb_byte *readbuf, const gdb_byte *writebuf)
Definition: sh-tdep.c:1420
static void sh_register_convert_to_raw(struct gdbarch *gdbarch, struct type *type, int regnum, const gdb_byte *from, gdb_byte *to)
Definition: sh-tdep.c:1587
void set_gdbarch_pseudo_register_read(struct gdbarch *gdbarch, gdbarch_pseudo_register_read_ftype pseudo_register_read)
Definition: gdbarch.c:1984
#define TYPE_VARARGS(t)
Definition: gdbtypes.h:247
static void sh_stub_this_id(struct frame_info *this_frame, void **this_cache, struct frame_id *this_id)
Definition: sh-tdep.c:2031
#define TYPE_TARGET_TYPE(thistype)
Definition: gdbtypes.h:1226
struct type * builtin_double
Definition: gdbtypes.h:1511
int gdbarch_register_reggroup_p(struct gdbarch *gdbarch, int regnum, struct reggroup *reggroup)
Definition: gdbarch.c:3589
static void sh_dwarf2_frame_init_reg(struct gdbarch *gdbarch, int regnum, struct dwarf2_frame_state_reg *reg, struct frame_info *this_frame)
Definition: sh-tdep.c:1794
static struct type * sh_sh2a_register_type(struct gdbarch *gdbarch, int reg_nr)
Definition: sh-tdep.c:1437
static const struct regset sh_corefile_fpregset
Definition: sh-tdep.c:2220
static void sh_store_return_value_fpu(struct type *type, struct regcache *regcache, const gdb_byte *valbuf)
Definition: sh-tdep.c:1383
CORE_ADDR pc
Definition: sh-tdep.c:77
static int sh_breakpoint_kind_from_pc(struct gdbarch *gdbarch, CORE_ADDR *pcptr)
Definition: sh-tdep.c:423
int gdbarch_fp0_regnum(struct gdbarch *gdbarch)
Definition: gdbarch.c:2197
#define XCNEW(T)
Definition: poison.h:121
static struct gdbarch * sh_gdbarch_init(struct gdbarch_info info, struct gdbarch_list *arches)
Definition: sh-tdep.c:2255
static int sh_next_flt_argreg(struct gdbarch *gdbarch, int len, struct type *func_type)
Definition: sh-tdep.c:969
#define TYPE_CODE(thistype)
Definition: gdbtypes.h:1238
enum register_status regcache_raw_read(struct regcache *regcache, int regnum, gdb_byte *buf)
Definition: regcache.c:565
struct value * frame_unwind_got_register(struct frame_info *frame, int regnum, int new_regnum)
Definition: frame-unwind.c:223
void regcache_cooked_write_unsigned(struct regcache *regcache, int regnum, ULONGEST val)
Definition: regcache.c:806
#define IS_RTS(x)
Definition: sh-tdep.c:535
static int in_plt_section(CORE_ADDR pc)
Definition: objfiles.h:542
#define TYPE_CALLING_CONVENTION(thistype)
Definition: gdbtypes.h:1327
static const char * sh_sh_register_name(struct gdbarch *gdbarch, int reg_nr)
Definition: sh-tdep.c:111
void set_gdbarch_int_bit(struct gdbarch *gdbarch, int int_bit)
Definition: gdbarch.c:1589
void _initialize_sh_tdep(void)
Definition: sh-tdep.c:2453
int offset
Definition: agent.c:65
static void sh_extract_return_value_fpu(struct type *type, struct regcache *regcache, gdb_byte *valbuf)
Definition: sh-tdep.c:1335
#define TYPE_NFIELDS(thistype)
Definition: gdbtypes.h:1239
Definition: buffer.h:23
void set_gdbarch_num_pseudo_regs(struct gdbarch *gdbarch, int num_pseudo_regs)
Definition: gdbarch.c:2067
static void sh_extract_return_value_nofpu(struct type *type, struct regcache *regcache, gdb_byte *valbuf)
Definition: sh-tdep.c:1310
static const char * sh_sh4_nofpu_register_name(struct gdbarch *gdbarch, int reg_nr)
Definition: sh-tdep.c:362
gdbarch * arch() const
Definition: regcache.c:221
void dwarf2_append_unwinders(struct gdbarch *gdbarch)
size_t sizeof_gregset
Definition: i386-tdep.h:63
#define IS_JSR(x)
Definition: sh-tdep.c:469
#define IS_PUSH(x)
Definition: sh-tdep.c:481
#define GET_SOURCE_REG(x)
Definition: sh-tdep.c:465
static int flt_argreg_array[FLOAT_ARGLAST_REGNUM - FLOAT_ARG0_REGNUM+1]
Definition: sh-tdep.c:950
#define FPSCR_SZ
Definition: sh-tdep.c:531
void set_gdbarch_double_format(struct gdbarch *gdbarch, const struct floatformat **double_format)
Definition: gdbarch.c:1739
void regcache_raw_supply(struct regcache *regcache, int regnum, const void *buf)
Definition: regcache.c:1004
static const char * sh_active_calling_convention
Definition: sh-tdep.c:68
unsigned long long ULONGEST
Definition: common-types.h:53
enum unwind_stop_reason default_frame_unwind_stop_reason(struct frame_info *this_frame, void **this_cache)
Definition: frame-unwind.c:184
static const struct frame_unwind sh_frame_unwind
Definition: sh-tdep.c:1970
#define IS_STS(x)
Definition: sh-tdep.c:473
static int ignore(struct target_ops *ops, struct gdbarch *gdbarch, struct bp_target_info *bp_tgt)
Definition: corelow.c:879
#define IS_MOV_R3(x)
Definition: sh-tdep.c:491
int register_size(struct gdbarch *gdbarch, int regnum)
Definition: regcache.c:164
static struct sh_frame_cache * sh_alloc_frame_cache(void)
Definition: sh-tdep.c:1839
static struct frame_id sh_dummy_id(struct gdbarch *gdbarch, struct frame_info *this_frame)
Definition: sh-tdep.c:1994
void set_gdbarch_long_double_bit(struct gdbarch *gdbarch, int long_double_bit)
Definition: gdbarch.c:1756
static const char sh_cc_renesas[]
Definition: sh-tdep.c:61
struct type * value_type(const struct value *value)
Definition: value.c:1095
void set_gdbarch_long_bit(struct gdbarch *gdbarch, int long_bit)
Definition: gdbarch.c:1606
void set_gdbarch_return_value(struct gdbarch *gdbarch, gdbarch_return_value_ftype return_value)
Definition: gdbarch.c:2738
const struct bfd_arch_info * gdbarch_bfd_arch_info(struct gdbarch *gdbarch)
Definition: gdbarch.c:1500
void dwarf2_frame_set_init_reg(struct gdbarch *gdbarch, void(*init_reg)(struct gdbarch *, int, struct dwarf2_frame_state_reg *, struct frame_info *))
Definition: dwarf2-frame.c:743
void regcache_raw_collect(const struct regcache *regcache, int regnum, void *buf)
Definition: regcache.c:1085
int gdbarch_pc_regnum(struct gdbarch *gdbarch)
Definition: gdbarch.c:2163
static struct sh_frame_cache * sh_frame_cache(struct frame_info *this_frame, void **this_cache)
Definition: sh-tdep.c:1866
#define IS_ADD_R3SP(x)
Definition: sh-tdep.c:496
int default_register_reggroup_p(struct gdbarch *gdbarch, int regnum, struct reggroup *group)
Definition: reggroups.c:192
static const char * sh_sh3e_register_name(struct gdbarch *gdbarch, int reg_nr)
Definition: sh-tdep.c:155
#define TYPE_LENGTH(thistype)
Definition: gdbtypes.h:1235
void set_gdbarch_ptr_bit(struct gdbarch *gdbarch, int ptr_bit)
Definition: gdbarch.c:1841
static int sh_stub_unwind_sniffer(const struct frame_unwind *self, struct frame_info *this_frame, void **this_prologue_cache)
Definition: sh-tdep.c:2044
void set_gdbarch_push_dummy_call(struct gdbarch *gdbarch, gdbarch_push_dummy_call_ftype push_dummy_call)
Definition: gdbarch.c:2381
gdbarch_init_ftype sh64_gdbarch_init
ULONGEST read_memory_unsigned_integer(CORE_ADDR memaddr, int len, enum bfd_endian byte_order)
Definition: corefile.c:326
void set_gdbarch_sw_breakpoint_from_kind(struct gdbarch *gdbarch, gdbarch_sw_breakpoint_from_kind_ftype sw_breakpoint_from_kind)
Definition: gdbarch.c:2888
void set_gdbarch_iterate_over_regset_sections(struct gdbarch *gdbarch, gdbarch_iterate_over_regset_sections_ftype iterate_over_regset_sections)
Definition: gdbarch.c:3647
static int sh_return_in_first_hidden_param_p(struct gdbarch *gdbarch, struct type *type)
Definition: sh-tdep.c:2246
void write_memory(CORE_ADDR memaddr, const bfd_byte *myaddr, ssize_t len)
Definition: corefile.c:394
void set_gdbarch_skip_prologue(struct gdbarch *gdbarch, gdbarch_skip_prologue_ftype skip_prologue)
Definition: gdbarch.c:2772
static CORE_ADDR sh_push_dummy_call_nofpu(struct gdbarch *gdbarch, struct value *function, struct regcache *regcache, CORE_ADDR bp_addr, int nargs, struct value **args, CORE_ADDR sp, int struct_return, CORE_ADDR struct_addr)
Definition: sh-tdep.c:1203
static const char * sh_sh4_register_name(struct gdbarch *gdbarch, int reg_nr)
Definition: sh-tdep.c:324
static int sh_stack_frame_destroyed_p(struct gdbarch *gdbarch, CORE_ADDR pc)
Definition: sh-tdep.c:2074
enum bfd_endian byte_order
Definition: gdbarch.c:137
void set_gdbarch_pc_regnum(struct gdbarch *gdbarch, int pc_regnum)
Definition: gdbarch.c:2173
static const struct frame_unwind sh_stub_unwind
Definition: sh-tdep.c:2057
void set_gdbarch_register_name(struct gdbarch *gdbarch, gdbarch_register_name_ftype register_name)
Definition: gdbarch.c:2292
static enum return_value_convention sh_return_value_nofpu(struct gdbarch *gdbarch, struct value *function, struct type *type, struct regcache *regcache, gdb_byte *readbuf, const gdb_byte *writebuf)
Definition: sh-tdep.c:1403
CORE_ADDR get_frame_func(struct frame_info *this_frame)
Definition: frame.c:1001
void error(const char *fmt,...)
Definition: errors.c:38
size_t size
Definition: go32-nat.c:242
static void show_sh_command(const char *args, int from_tty)
Definition: sh-tdep.c:2439
struct gdbarch * gdbarch_alloc(const struct gdbarch_info *info, struct gdbarch_tdep *tdep)
Definition: gdbarch.c:361
void set_gdbarch_inner_than(struct gdbarch *gdbarch, gdbarch_inner_than_ftype inner_than)
Definition: gdbarch.c:2837
struct gdbarch * get_frame_arch(struct frame_info *this_frame)
Definition: frame.c:2691
long long LONGEST
Definition: common-types.h:52
struct type * builtin_float
Definition: gdbtypes.h:1510
static void store_unsigned_integer(gdb_byte *addr, int len, enum bfd_endian byte_order, ULONGEST val)
Definition: defs.h:604
#define gdb_stdout
Definition: utils.h:340
struct type * builtin_int
Definition: gdbtypes.h:1503
void regcache_raw_write(struct regcache *regcache, int regnum, const gdb_byte *buf)
Definition: regcache.c:831