Go to the documentation of this file. 21 #define X86_XSTATE_H 1 24 #define X86_XSTATE_X87 (1ULL << 0) 25 #define X86_XSTATE_SSE (1ULL << 1) 26 #define X86_XSTATE_AVX (1ULL << 2) 27 #define X86_XSTATE_BNDREGS (1ULL << 3) 28 #define X86_XSTATE_BNDCFG (1ULL << 4) 29 #define X86_XSTATE_MPX (X86_XSTATE_BNDREGS | X86_XSTATE_BNDCFG) 32 #define X86_XSTATE_K (1ULL << 5) 33 #define X86_XSTATE_ZMM_H (1ULL << 6) 34 #define X86_XSTATE_ZMM (1ULL << 7) 35 #define X86_XSTATE_AVX512 (X86_XSTATE_K | X86_XSTATE_ZMM_H \ 38 #define X86_XSTATE_PKRU (1ULL << 9) 41 #define X86_XSTATE_X87_MASK X86_XSTATE_X87 42 #define X86_XSTATE_SSE_MASK (X86_XSTATE_X87 | X86_XSTATE_SSE) 43 #define X86_XSTATE_AVX_MASK (X86_XSTATE_SSE_MASK | X86_XSTATE_AVX) 44 #define X86_XSTATE_MPX_MASK (X86_XSTATE_SSE_MASK | X86_XSTATE_MPX) 45 #define X86_XSTATE_AVX_MPX_MASK (X86_XSTATE_AVX_MASK | X86_XSTATE_MPX) 46 #define X86_XSTATE_AVX_AVX512_MASK (X86_XSTATE_AVX_MASK | X86_XSTATE_AVX512) 47 #define X86_XSTATE_AVX_MPX_AVX512_PKU_MASK (X86_XSTATE_AVX_MPX_MASK\ 48 | X86_XSTATE_AVX512 | X86_XSTATE_PKRU) 50 #define X86_XSTATE_ALL_MASK (X86_XSTATE_AVX_MPX_AVX512_PKU_MASK) 53 #define X86_XSTATE_SSE_SIZE 576 54 #define X86_XSTATE_AVX_SIZE 832 55 #define X86_XSTATE_BNDREGS_SIZE 1024 56 #define X86_XSTATE_BNDCFG_SIZE 1088 57 #define X86_XSTATE_AVX512_SIZE 2688 58 #define X86_XSTATE_PKRU_SIZE 2696 59 #define X86_XSTATE_MAX_SIZE 2696 63 #define HAS_MPX(XCR0) (((XCR0) & X86_XSTATE_MPX) != 0) 64 #define HAS_AVX(XCR0) (((XCR0) & X86_XSTATE_AVX) != 0) 65 #define HAS_AVX512(XCR0) (((XCR0) & X86_XSTATE_AVX512) != 0) 66 #define HAS_PKRU(XCR0) (((XCR0) & X86_XSTATE_PKRU) != 0) 69 #define X86_XSTATE_SIZE(XCR0) \ 70 (HAS_PKRU (XCR0) ? X86_XSTATE_PKRU_SIZE : \ 71 (HAS_AVX512 (XCR0) ? X86_XSTATE_AVX512_SIZE : \ 72 (HAS_MPX (XCR0) ? X86_XSTATE_BNDCFG_SIZE : \ 73 (HAS_AVX (XCR0) ? X86_XSTATE_AVX_SIZE : X86_XSTATE_SSE_SIZE))))