PACKAGE NAME:  iverilog-10.2-x86_64-1.txz
PACKAGE LOCATION:  .
PACKAGE SIZE (compressed):  1355 K
PACKAGE SIZE (uncompressed):  4540 K
PACKAGE REQUIRED:  
PACKAGE CONFLICTS:  
PACKAGE SUGGESTS:  qucs
PACKAGE DESCRIPTION:
iverilog: iverilog 10.2 (Verilog simulator and synthesis)  
iverilog:  
iverilog: Icarus Verilog is a Verilog simulation and synthesis tool. It 
iverilog: operates as a compiler, compiling source code written in Verilog 
iverilog: (IEEE-1364) into some target format. For batch simulation, the 
iverilog: compiler can generate an intermediate form called vvp assembly. This 
iverilog: intermediate form is executed by the vvp command. For synthesis, 
iverilog: the compiler generates netlists in the desired format.  
iverilog: 
iverilog: http://iverilog.icarus.com/ 
iverilog: